• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제23권12호
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• pp.136-145
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• 2009

This paper proposes control methods and simulation models of a driving system, which consists of converters and inverters, for high speed trains employing multi-level power converters. The control method of a single phase three-level converter for high-speed trains is designed to use DC values instead of instantaneous current values which are usually used in single-phase application, so that it results in a fast and robust voltage control response. In addition, simulation models of Space Vector Pulse Width Modulation (SVPWM) for single phase three-level converters as well as three level inverters are proposed. Experimental results demonstrate the validity of the simulation model for three-level inverters.

• Proceedings of the KIEE Conference
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.258-261
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• 1994

This paper presents a circuit design far clamping the overvoltages across the GTOs in three-level GTO inverters. The proposed circuit has two roles as follows; one is to minimize the power dissipation in each GTO. It can be achieved by clamping the overvoltage to half that of the DC-link voltage as exactly as possible. The other is to get blocking voltage balancing between the inner GTOs and the outer GTOs.

• Proceedings of the KIEE Conference
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• 대한전기학회 1994년도 추계학술대회 논문집 학회본부
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• pp.153-155
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• 1994

This paper presents a new low loss snubber including the overvoltage snubber for three-level GTO inverters. The proposed snubber can not only minimizes the snubber loss and the number of components but also improve blocking voltage balancing problem between the inner and the outer GTOs.

• Journal of international Conference on Electrical Machines and Systems
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• 제1권3호
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• pp.366-371
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• 2012

In this paper, we propose an electric circuit using one common-arm of H-Bridge inverters to reduce the number of switching components in the multi-level inverter combined with H-Bridge inverters and transformers. And furthermore, we suggested a new multi-level PWM inverter using PWM level to reduce THD (Total Harmonic Distortion). We use a phase-shift switching method that has the same rate of usage at each transformer. Also, we test the proposed prototype 9-level inverter to clarify the proposed electric circuit and reasonableness of the control signal for the proposed multi-level PWM inverter.

• Proceedings of the KIEE Conference
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1035-1037
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• 2001

This paper presents an improved hys- teresis current control method for three-phase PWM power inverters using 3-level comparator. Hysteresis current controller using 3-level comparator has an advantage of constant switching frequency compared with conventional hysteresis current controller. However, this method has disadvantage that the longer sampling period, the larger current error because the switching is performed without considering current error magnitude of each phase. The proposed method improves the control performance by selecting the optimum switching pattern in which the magnitudes of current errors are considered introducing space vector concept. Simulation results using Matlab/Simulink show that the proposed control method reduces current error keeping the merit of previous hysteresis current control method.

• Proceedings of the KIEE Conference
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• 대한전기학회 1999년도 추계학술대회 논문집 학회본부 A
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• pp.361-363
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• 1999

This paper proposes an SSSC based on 3-level half-bridge inverters. The dynamic characteristic of the proposed SSSC was analyzed by EMTP simulation, assuming that the SSSC is inserted in the transmission line of the one-machine-infinite-bus power system. The proposed SSSC has six 3-level half-bridge inverters per phase, which operates in PWM mode. The proposed SSSC generates a quasi-sinusoidal output voltage by 90 degree phase shift to the line current. The proposed SSSC does not require the coupling transformer for voltage injection, and has a flexibility in operation voltage by increasing the number of series connection.

• Proceedings of the KIEE Conference
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• 대한전기학회 1996년도 하계학술대회 논문집 A
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• pp.339-341
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• 1996

The objective of this paper is to present the design of a Neural Network(NH) based optimal pulse-width modulation(PWM) techniques for a three-level power inverter. Considering the importance of safety, power factor and harmonics of power inverters, two-level type and three-level type of power inverters using NNs are precisely investigated and compared in computer simulation.

• The Transactions of The Korean Institute of Electrical Engineers
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• 제65권2호
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• pp.319-328
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• 2016

This paper proposes a simplified SVPWM for three level inverters in transformerless photovoltaic (PV) systems. With the proposed SVPWM the three level space vector (SV) diagram is divided into only six sectors as in conventional two level SV diagram in such a way that only seven SVs are used among all the available SVs of three level inverter. The main features of the proposed SVPWM are that it is simple to implement, less switching losses as compared to conventional SVPWM and most importantly it eliminates the leakage currents in transformerless PV systems. Detailed theoretical analysis of the proposed SVPWM are presented and verified by numerical simulations and experimental results.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 한국해양정보통신학회 2005년도 추계종합학술대회
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• pp.681-684
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• 2005

This paper presents a useful multilevel PWM inverter scheme based on a (3$^{n-1}$+2) level generation technique. It consists of a PWM inverter, an assembly of LEVEL inverters, and cascaded transformers. To produce high quality output voltage waves, it synthesizes a large number of output voltage levels using cascaded transformers, which have a series-connected secondary. By a suitable selection of secondary turn-ration of the transformer, the amplitude of an output voltage is appeared at the rate of an integer to an input dc source. Operational principles and analysis are illustrated in depth. The validity of the proposed system is verified through computer-aided simulations and experimental results using prototypes generation output voltages of an 11-level and a 29-level, respectively. And their results are compared with conventional counterparts.

• Proceedings of the KIEE Conference
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• 대한전기학회 2001년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.274-276
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• 2001

A simple current controller for three-phase PWM power inverters using 3-level comparator is presented. All voltage vectors are accurately selected in order to minimize the current error using two three-level comparators and ${\alpha}-{\beta}$ current reference frame. The proposed algorithm have fast response and low current errors. This current controller is improved synchronization problem and increased the voltage utilization value. Usefulness of propose method are verified on the simulation result using Matlab/Simulink.