• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.263-269
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• 2018

In this study, a selective inverter operation between a 2-level voltage source converter (VSC) and a 3-level T-type VSC (3LT VSC) is proposed to improve the efficiency of a 3LT VSC. The 3LT VSC topology, except for its neutral-point switches, has similar operations as that of the 2-level VSC. If an operation mode is changed according to efficiency, the efficiency can be improved because efficiencies of each methods are depending on current and MI (Modulation Index). The proposed method calculates the power losses of the two topologies and operates as the having lower losses. To calculate the losses, the switching and conduction losses based on the operation mode of each topology were analyzed. The controller determined the operation mode of the 2- or 3-level VSC based on the power loss calculated during every cycle. The validity of the proposed control scheme was investigated through simulation and experiments. The waveform and average efficiency of each method were compared.

• Journal of Power Electronics
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• v.9 no.3
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• pp.481-490
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• 2009

This paper describes a SVPWM overmodulation scheme of NPC type three-level inverter for traction drives which extends the modulation index from MI=0.907 to unity. SVPWM strategy is organized by two operation modes of under-modulation and over-modulation. The switching states under the under-modulation modes are determined by dividing them with two linear regions and one hybrid region the same as the conventional three-level inverter. On the other hand, under the over-modulation mode, they are generated by doing it with two over-modulation regions the same as the conventional over-modulation strategy of a two level inverter. Following the description of over-modulation scheme of a three-level inverter, the system description of a vector controlled induction motor for traction drives has been discussed. Finally, the validity of the proposed modulation algorithm has been verified through simulation and experimental results.

• Journal of Power Electronics
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• v.14 no.5
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• pp.937-945
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• 2014

This paper presents an optimized space vector pulse-width modulation (OSVPWM) technique for a five-level cascaded H-bridge (CHB) inverter. The space vector diagram of the five-level CHB inverter is optimized by resolving it into inner and outer two-level space vector hexagons. Unlike conventional space vector topology, the proposed technique significantly reduces the involved computational time and efforts without compromising the performance of the five-level CHB inverter. A further optimized (FOSVPWM) technique is also presented in this paper, which significantly reduces the complexity and computational efforts. The developed techniques are verified through MATLAB/SIMULINK. Results are compared with sinusoidal pulse-width modulation (SPWM) to prove the validity of the proposed technique. The proposed simulation system is realized by using an XC3S400 field-programmable gate array from Xilinx, Inc. The experiment results are then presented for verification.

• Journal of Power Electronics
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• v.19 no.2
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• pp.413-430
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• 2019

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.630-634
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• 2004

A new three phase three-level Pulse Width Modulation (PWM) Switched Voltage Source (SVS) inverter with zero neutral point potential is proposed. The major advantage is that the peak value of the phase output voltage is twice as high as that of the conventional neutral-point-clamped (NPC) PWM inverter. Furthermore, three-level waveforms of the proposed inverter can be achieved without switch voltage unbalance problem. Since the average neutral point potential of the proposed inverter is zero, the common ground between input stage and output stage is possible. The proposed inverter is verified by experimental results based on a laboratory prototype.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.78-84
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• 2011

In this paper, the switching frequency and THD for the reduction instead of traditional single phase inverter using a new type of central arm of the single phase inverter is proposed. The proposed single phase inverter topology, the existing one to add a arm by two-way central switch 3-level output voltage can be raised and, central arm, especially one or two of the switches by using a switch to the diode current switching algorithm was simplified. During the dead time because of this, depending on the direction of the current level does not appear in any other existing level compared to the inverter output voltage level of the THD has the advantage that less can be. The simulation and experimental results verified the validity of the proposed topology.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.2
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• pp.311-318
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• 2016

This paper is a study on the neutral point voltage balancing of the three-phase 3-level T-type inverter using the predictive control techniques. Recently, multi-level inverter has been attracting attention as the advantages such as efficiency improving and harmonic reduction. Especially, the T-type inverter topology is advantageous in low DC-link voltage. However, in case of the prediction control, it takes a lot of time, because there exist 27 voltage vectors and it has to be calculated according to the respective voltage vectors. Therefore, in this paper, we propose a method to implement predictive control techniques while reducing the operation time. In order to reduce the operation time, the predictive control is implemented by using the minimum voltage vector except for the unnecessary voltage vector. The result of the implemented predictive control is added to the SPWM by using the offset voltage. It was verified through simulation and experimental results.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.51 no.3
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• pp.125-132
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• 2002

This paper presents a single-phase 3-level PWM inverter to alleviate the harmonic components of output voltage and current under the conditions of identical supply DC voltage and switching frequency to the conventional inverter. Operational principles and analysis are performed, and the switching functions are derived. Deadbeat controller is also designed and implemented for the inverter to keep the output voltage being sinusoidal and to have the high dynamic performances even in the cases of load variations and the partial magnetization of filter inductor. The validity of proposed inverter is proved from the simulated and experimented results.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.3
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• pp.257-265
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• 2014

This paper proposes a simple compensation method for switches of the unclamped voltage in the three-level NPC inverter. Voltages of inner-switches can be unclamped in the three-level NPC (neutral point clamped) inverter. It can cause the problem of the switch fault accident. By adding a capacitor, switches of the unclamped voltage can be clamped. Through the analysis of the circuit, the reason behind switches being unclamped was verified which leads to the solution method that designs a compensation capacitor. The proposed method was validated through the simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.2 no.3
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• pp.373-378
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• 2007

Soft switching was applied to the multi-level inverter to enhance the performance of the high-intensity discharge (HID) ballast used in vehicle headlights. The electrical properties were investigated and the available modeling of ballast in steady state was calculated using mathematical methods. The result was used in analyzing the power characteristics. The modeling was confirmed by the experiment.