• 제목/요약/키워드: 3-D passives

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Solenoid Type 3-D Passives(Inductors and Trans-formers) For Advanced Mobile Telecommunication Systems

  • Park, Jae Y.;Jong U. Bu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권4호
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    • pp.295-301
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    • 2002
  • In this paper, solenoid-type 3-D passives (inductors and transformers) have been designed, fabricated, and characterized by using electroplating techniques, wire bonding techniques, multi-layer thick photoresist, and low temperature processes which are compatible with semiconductor circuitry fabrication. Two different fabrication approaches are performed to develop the solenoid-type 3-D passives and relationship of performance characteristics and geometry is also deeply investigated such as windings, cross-sectional area of core, spacing between windings, and turn ratio. Fully integrated inductor has a quality factor of 31 at 6 GHz, an inductance of 2.7 nH, and a self resonant frequency of 15.8 GHz. Bonded wire inductor has a quality factor of 120, an inductance of 20 nH, and a self resonant frequency of 8 GHz. Integrated transformers with turn ratios of 1:1 and n:l have the minimum insertion loss of about 0.6 dB and the wide bandwidth of a few GHz.

집중 소자를 이용한 이중 대역 GSM/DCS용 적층형 다이플렉서의 설계 및 제작 (Design and Fabrication of Multilayer Diplexer for Dual Band GSM/DCS Applications using Lumped Elements)

  • 심성훈;강종윤;최지원;윤영중;김현재;윤석진
    • 한국세라믹학회지
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    • 제40권11호
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    • pp.1090-1095
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    • 2003
  • 본 논문에서는 고품질 적층형 수동 소자의 모델링 및 설계에 관하여 연구하였고, 설계된 수동 소자를 이용하여 안테나 스위치 모듈 내에 포함된 이중 대역 GSM/DCS 대역 분리용 적층형 다이플렉서를 설계$.$제작하여 그 특성을 고찰하였다. 적층형 수동 소자는 시스템의 소형화를 위해 인덕터는 정방형 스파이럴 구조로, 캐패시터는 입체적인 인터디지털 형태인 VIC 구조로 설계하였다. GSM 저역 통과 필터는 0.55 dB 이하의 삽입 손실과 12dB 이상의 반사 손실을 나타내며, 통과 대역 위쪽 저지 대역인 1800 MHz 부근에 감쇠극이 존재하도록 설계함으로써 DCS 통과 대역에서 26 dB 이상의 저지 특성을 나타내었다. DCS 고역 통과 필터는 0.82 dB 이하의 삽입 손실과 11 dB 이상의 반사손실을 가지며, 통과 대역 아래 쪽 저지 대역인 930 MHz 부근에 감쇠극이 존재하도록 설계함으로써 GSM 통과 대역에서 38 dB 이상의 저지 특성을 나타내었다.

Monolithically Integrable RF MEMS Passives

  • Park, Eun-Chul;Park, Yun-Seok;Yoon, Jun-Bo;Euisik Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권1호
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    • pp.49-55
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    • 2002
  • This paper presents high performance MEMS passives using fully CMOS compatible, monolithically integrable 3-D RF MEMS processes for RF and microwave applications. The 3-D RF MEMS technology has been developed and investigated as a viable technological option, which can break the limit of the conventional IC technology. We have demonstrated the versatility of the technology by fabricating various 3-D thick-metal microstructures for RF and microwave applications, such as spiral/solenoid inductors, transformers, and transmission lines, with a vertical dimension of up to $100{\;}\mu\textrm{m}$. To the best of our knowledge, we report that we are the first to construct a fully integrated VCO with MEMS inductors, which has achieved a low phase noise of -124 dBc/Hz at 300 kHz offset from a center frequency of 1 GHz.

IC Interposer Technology Trends

  • Min, Byoung-Youl
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 International Symposium
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    • pp.3-17
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    • 2003
  • .Package Trend -> Memory : Lighter, Thinner, Smaller & High Density => SiP, 3D Stack -> MPU : High Pin Counts & Multi-functional => FCBGA .Interposer Trend -> Via - Unfilled Via => Filled Via - Staggered Via => Stacked Via -> Emergence of All-layer Build-up Processes -> Interposer Material Requirement => Low CTE, Low $D_{k}$, Low $D_{f}$, Halogen-free .New Technology Concept -> Embedded Passives, Imprint, MLTS, BBUL etc.

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3차원 매립형 수동소자의 특성 예측 및 분석에 대한 연구 (Characteristic Prediction and Analysis of 3-D Embedded Passive Devices)

  • 신동욱;오창훈;이규복;김종규;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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    • pp.607-610
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    • 2003
  • The characteristic prediction and analysis of 3-dimensional (3-D) solenoid-type embedded inductors is investigated. The four different structures of 3-D inductor are fabricated by using low-temperature cofired ceramic (LTCC) process. The circuit model parameters of the each building block are optimized and extracted using the partial element equivalent circuit method and HSPICE circuit simulator. Based on the model parameters, predictive modeling is applied for the structures composed of the combination of the modeled building blocks. And the characteristics of test structures, such as self-resonant frequency, inductance and Q-factor, are analyzed. This approach can provide the characteristic conception of 3-D solenoid embedded inductors for structural variations.

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1${\sim}$3 GHz 대역의 GMS Type Switch Module 특성에 관한 연구 (A study on the Characteristics of RF switch module on 1${\sim}$3 GHz Band)

  • 김인성;송재성;서영석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 하계학술대회 논문집 C
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    • pp.1673-1675
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    • 2004
  • The design, modeling and measurement of RF switch module for GSM applications is presented in this paper. RF switch module is constructed using a LTCC multi-layer switching circuit and integrated low pass filter. Insertion and return loss of the low pass filter were designed less than 0.3 dB and better than 12.7 dB at 900 MHz. The RF switch module contained 10 embedded passives and 3 surface mount components integrated on $4.6{\times}4.8{\times}1.2$ mm, 6-layer multi-layer integrated circuit. The insertion loss of switch module was measured at 900 MHz was 11 dB.

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세라믹 적층형 스위치 모듈 설계에 관한 연구 (A study on the design of switch module for devices)

  • 김인성;송재성;민복기
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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    • pp.431-434
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    • 2004
  • The design, simulation, modeling and measurement of a RF switch module for GSM applications were presented in this paper. switch module were simulated by ADS and constructed using a LTCC multi-layer switching circuit and integrated low pass filter, designed to operate in the GSM band. Insertion and return losses at 900 MHz of the low pass filters were designed to lower than 0.3 dB and higher than 12.7 dB respectively. The switch module constructed, contained 10 embedded passives and 3 surface mounted components integrated on $4.6{\times}4.8{\times}1.2$ m volume, 6-layer integrated circuit. The insertion loss of switch module at m MHz were around 11 dB.

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Integrated 3-D Microstructures for RF Applications (Invited)

  • Euisik Yoon;Yoon, Jun-Bo;Park, Eun-Chul;Han, Chul-Hi;Kim, Choong-Ki
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.203-207
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    • 1999
  • In this paper we report new integration technology developed for three-dimensional metallic microstructures in an arbitrary shape. We have developed the two fabrication methods: Multi-Exposure and Single-Development (MESD) and Sacrificial Metallic Mold(SMM) techniques. Three-dimensional photoresist mold can be formed by the MESD method while unlimited number of structural levels can be realized by the SMM technique. Using these two techniques we have fabricated solenoid inductors and levitated spiral inductors for RF applications. We have achieved peak Q- factors over 40 in the 2-10㎓ range, the highest number among the inductors reported to date. Finally, we propose "On-Chip Passives" as a post IC process for monolithic integration of inductors, tunable capacitors, microwave switches, transmission lines, and mixers and filters toward future single-chip transceiver integration.

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Fully Embedded 2.4GHz Compact Band Pass Filter into Multi-Layered Organic Packaging Substrate

  • Lee, Seung-J.;Lee, Duk-H.;Park, Jae-Y.
    • 마이크로전자및패키징학회지
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    • 제15권1호
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    • pp.39-44
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    • 2008
  • In this paper, fully embedded 2.4GHz WLAN band pass filter (BPF) was investigated into a multi-layered organic packaging substrate using high Q spiral stacked inductors and high Dk MIM capacitors for low cost RF System on Package (SOP) applications. The proposed 2.4GHz WLAN BPF was designed by modifying chebyshev second order filter circuit topology. It was comprised of two parallel LC resonators for obtaining two transmission zeros. It was designed by using 2D circuit and 3D EM simulators for finding out optimal geometries and verifying their applicability. It exhibited an insertion loss of max -1.7dB and return loss of min -l7dB. The two transmission zeros were observed at 1.85 and 6.7GHz, respectively. In the low frequency band of $1.8GHz{\sim}1.9GHz$, the stop band suppression of min -23dB was achieved. In the high frequency band of $4.1GHz{\sim}5.4GHz$, the stop band suppression of min -l8dB was obtained. It was the first embedded and the smallest one of the filters formed into the organic packaging substrate. It has a size of $2.2{\times}1.8{\times}0.77mm^3$.

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Circuit Modeling of 3-D Parallel-plate Capacitors Fabricated by LTCC Process

  • Shin, Dong-Wook;Oh, Chang-Hoon;Yun, Il-Gu;Lee, Kyu-Bok;Kim, Jong-Kyu
    • Transactions on Electrical and Electronic Materials
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    • 제5권1호
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    • pp.19-23
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    • 2004
  • A novel method of high speed, accurate circuit simulation in 3-dimensional (3-D) parallel-plate capacitors is investigated. The basic concept of the circuit simulation methods is partial element equivalent circuit model. The three test structures of 3-D parallel-plate capacitors are fabricated by using multi-layer low-temperature co-fired ceramic (LTCC) process and their S-parameters are measured between 50 MHz and 5 GHz. S-parameters are converted to Y-parameters, for comparing measured data with simulated data. The circuit model parameters of the each building block are optimized and extracted using HSPICE circuit simulator. This method is convenient and accurate so that circuit design applications can be easily manipulated.