• The Journal of Korean Institute of Communications and Information Sciences
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• 제26권12C호
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• pp.268-272
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• 2001

In this thesis, PLVCO(Phase Locked Voltage Controlled Oscillator) using 24.42 GHz voltage controlled hair-pin resonator oscillator, Sequency divider, buffer amplifier, -10 dB directional coupler and phase detector is designed and fabricated for B-WLL. The PLVCO shows the oscillator output power of 16.5 dBm at 24.42 GHz, and phase noise of -76.3 dBc/Hz at 1001:Hz offset, -72.8dBc/Hz at 10 kHz offset from fundamental frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제21권6호
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• pp.670-680
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• 2010

A low power single-chip CMOS receiver for 60 GHz mobile application are proposed in this paper. The single-chip receiver consists of a 4-stage current re-use LNA with under 4 dB NF, Cgs compensating resistive mixer with -9.4 dB conversion gain, Ka-band low phase noise VCO with -113 dBc/Hz phase noise at 1 MHz offset from 26.89 GHz, high-suppression frequency doubler with -0.45 dB conversion gain, and 2-stage current re-use drive amplifier. The size of the fabricated receiver using a standard 0.13 ${\mu}m$ CMOS technology is 2.67 mm$\times$0.75 mm including probing pads. An RF bandwidth is 6.2 GHz, from 55 to 61.2 GHz and an LO tuning range is 7.14 GHz, from 48.45 GHz to 55.59 GHz. The If bandwidth is 5.25 GHz(4.75~10 GHz) The conversion gain and input P1 dB are -9.5 dB and -12.5 dBm, respectively, at RF frequency of 59 GHz. The proposed single-chip receiver describes very good noise performances and linearity with very low DC power consumption of only 21.9 mW.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제26권5호
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• pp.471-482
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• 2015

In this paper, design and implementation of the 94 GHz Gunn oscillator and the evaluation of the maximum power of the Gunn diode used in the oscillator are presented. The 94 GHz Gunn oscillator is used InP Gunn diode and designed employing a WR-10 waveguide. The designed oscillator is fabricated through machining and its performance is measured. The fabricated oscillator shows an oscillation frequency of 95 GHz, output power of 12.64 dBm, and phase noise of -92.7 dBc/Hz at 1 MHz offset frequency. To evaluation the maximum power of the InP Gunn diode used in oscillator, the oscillator structure is modified to a structure having a diaphram. The height of thick diaphram which is used in the oscillator is varied. As a result, an oscillator has several different load impedances, which makes it possible to plot $G_L-V^2$ plot at the post plane. Using the $G_L-V^2$ plot, the maximum power of used Gunn diode including post is computed to be 16.8 dBm. Furthermore using the shorted and zero bias Gunn diode, the post loss used for DC biasing can be computed. Using the two losses, The maximum power of a InP Gunn diode is computed to be 18.55 dBm at 95 GHz. This result is close to a datasheet.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제26권10호
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• pp.876-884
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• 2015

In this paper, a switched beamforming antenna system at 28 GHz frequency band is described for $5^{th}$ generation wireless communication. The butler matrix is used as a beamforming system and it produces linear spaced phase difference at four output ports. Array antenna is designed that can be steered in desired 4 different directions 28 GHz frequency band. Operation of designed butler matrix that composed of couplers and feedline is explained. The antenna system is designed in RO3003 substrate that has a height of 5 mil and dielectric constant of 3. The size of butler matrix is $20.3{\times}13.0mm^2$ and size of array antenna is $21.2{\times}19.9mm^2$. This system can be steered from $-34^{\circ}$ to $33^{\circ}$ and minimum sidelobe level is 12.9 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제26권3호
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• pp.257-267
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• 2015

This paper presents a ultra-wideband sinuous antenna that operates in a whole frequency range (0.824~5.85 GHz) of Cellular/GSM-800, GSM900, ISM, GPS, DCS/GSM1800, PCS/GSM1900, WCDMA/UMTS/IMT2000, WiBro, WLAN and WiMax. The proposed antenna, which is composed of two sinuous arms, is designed as a self-complementary structure in order to have frequency-independent characteristics. It also uses a wideband balun of Klopfenstein taper structure to match to $50{\Omega}$. Experimental results show that the -10 dB return loss bandwidth of the proposed antenna is 5.24 GHz that ranges from 0.76 to 6 GHz, which covers all the frequency bands of the various wireless services. Within the entire operating frequency range, the measured radiation patterns in both E-plane and H-plane show nearly constant bidirectional broadside beams and the maximum antenna gain is measured to fall between 2.32~6.01 dBi.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제27권3호
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• pp.269-276
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• 2016

This paper presents a 2.65 GHz Doherty power amplifier with internally-matched GaN HEMT. Internal matching circuits were adopted to match its harmonic impedances inside the package. Simultaneously, due to the partially matched fundamental impedance, input and output matching networks become simpler. Bond wires and parasitic elements of transistor package were predicted by EM simulation. For the LTE signal with 6.5 dB PAPR, the implemented Doherty power amplifier shows a power gain of 13.0 dB, a saturated output power of 55.4 dBm, an efficiency of 49.1 %, and ACLR of -26.3 dBc at 2.65 GHz with an operating voltage of 48 V.

• Journal of Advanced Navigation Technology
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• 제21권1호
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• pp.84-89
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• 2017

This paper presents a dual-wideband bandpass filter (BPF) with high band-to-band isolation and skirt selectivity using distributed composite right/left-handed (CRLH) transmission line (TL) quad-mode resonators (QMRs). The results of the proposed distributed CRLH TL unit cell analysis are used to establish the scattering parameters and the resonance frequencies of the QMR constituting the dual-wideband BPF. A novel dual-wideband bandpass filter is designed and fabricated, using the derived scattering characteristics. The measured results show that the fabricated dual-wideband bandpass filter has an insertion loss of less than 1.08dB in the lower band, and of 2.01dB in the upper band, a bandwidth of 2.8-5.52GHz and 9.68-12.26GHz, and a band-to-band isolation of more than 38dB, from 6.34-8.42GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제26권7호
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• pp.620-626
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• 2015

In this paper, a 2~6 GHz wideband GaN power amplifier MMIC is designed and fabricated using a second-order all-pass filter for input impedance matching and an LC parallel resonant circuit for minimizing an output reactance component of the transistor. The second-order all-pass filter used for wideband lossy matching is modified in an asymmetric configuration to compensate the effect of channel resistance of the GaN transistor. The power amplifier MMIC chip that is fabricated using a $0.25{\mu}m$ GaN HEMT foundry process of Win Semiconductors, Corp. is $2.6mm{\times}1.3mm$ and shows a flat linear gain of about 13 dB and input return loss of larger than 10 dB. Under a saturated power mode, it also shows output power of 38.6~39.8 dBm and a power-added efficiency of 31.3~43.4 % in 2 to 6 GHz.

• Journal of the Korea Academia-Industrial cooperation Society
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• 제15권3호
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• pp.1734-1739
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• 2014

In this paper, microstrip low pass filter using transmission line with the modified DCRLH structure is designed and fabricated to be removed a spurious resonant mode, and a deep attenuation in stop band. The low pass filter is composed of shunt open-stub to get a deep attenuation and series short-stub to eliminate the spurious harmonics in stop band. In this way, the spurious harmonics occurring on the higher order frequency are suppressed and the filter performance is improved. Insertion loss and VSWR of the fabricated microstrip low pass filter in the passband from DC to 1.5 GHz is 1.26 dB and 1.65, and attenuation on the stopband from 1.84 GHz to 2.18 GHz is less than -100 dB. And also this filter has a good performance for 20 watt power test.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제49권7호
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• pp.23-29
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• 2012

The LC-based digitally controlled oscillator (LC-DCO), a key component of the all digital phase locked loop (ADPLL), is designed using $0.18{\mu}m$ RFCMOS process with 1.8 V supply. The NMOS core with double cross-coupled pair is chosen to realize wide tuning range, and the PMOS varactor pair that has small capacitance of a few aF and the capacitive degeneration technique to shrink the capacitive element are adopted to obtain the high frequency resolution. Also, the noise filtering technique is used to improve phase noise performance. Measurement results show the center frequency of 2.7 GHz, the tuning range of 2.5 GHz and the high frequency resolution of 2.9 kHz ~7.1 kHz. Also the fine tuning range and the current consumption of the core could be controlled by using the array of PMOS transistors using current biasing. The current consumption is between 17 mA and 26 mA at 1.8V supply voltage. The proposed DCO could be used widely in various communication system.