• Proceedings of the Korea Multimedia Society Conference
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• 2012.05a
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• pp.336-339
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• 2012

본 논문에서는 비선형 MLCA(Maximum Length Cellular Automata)와 1D CAT(One-Dimensional Cellular Automata Transform)를 이용하여 의료 영상 암호화 방법을 제안한다. 암호화 방법은 먼저, Wolfram Rule 행렬에 의해 전이행렬 T를 생성한다. 그 후, 암호화하려는 원 영상에 생성된 전이 행렬 T를 곱하여 원 영상의 픽셀 값을 변환한다. 또한 변환된 원 영상을 여원 벡터 F와 XOR 연산하여 비선형 MLCA가 적용된 영상으로 변환한다. 다음, 게이트웨이 값을 설정하여 1D CAT 기저함수를 생성한다. 그리고, 비선형 MLCA가 적용된 영상에 생성된 1D CAT 기저함수를 곱하여 암호화를 한다. 마지막으로 키 공간 분석을 통하여 제안한 방법이 높은 암호화 수준의 성질을 가졌음을 검증한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.5
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• pp.312-320
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• 2003

This work describes an 8b 200 MHz 0.18 urn CMOS analog-to-digital converter (ADC) based on a pipelined architecture for flat panel display applications. The proposed ABC employs an improved bootstrapping technique to obtain wider input bandwidth than the sampling tate of 200 MHz. The bootstrapuing technique improves the accuracy of the input sample-and-hold amplifier (SHA) and the fast fourier transform (FFT) analysis of the SHA outputs shows the 7.2 effective number of bits with an input sinusoidal wave frequency of 500 MHz and the sampling clock of 200 MHz at a 1.7 V supply voltage. Merged-capacitor switching (MCS) technique increases the sampling rate of the ADC by reducing the number of capacitors required in conventional ADC's by 50 % and minimizes chip area simultaneously. The simulated ADC in a 0.18 um n-well single-poly quad-metal CMOS technology shows an 8b resolution and a 73 mW power dissipation at a 200 MHz sampling clock and a 1.7 V supply voltage.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.184-187
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• 2002

Two-dimensional (2-D) X-ray computerized tomography (CT) equipments are widely used in industrial and medical fields, and nowadays studies on reconstruction algorithm for 3-D cone-beam acquisition systems are active for better utilization. The authors recent-By have proposed a fast reconstruction aigorithm using tree-structured filter bank for 2-D C1, and shown the algorithm is applicable to an approximate reconstruction of 3-D CT. For exact 3-D CT reconstruction, however, we have to backproject 1-D signal into 3-D space. This paper proposes a fast implementation method for this back-projection by use of tree-structured filter bank. and shows the proposed method works approximately 700 times faster than the direct one with almost same reconstruction image quality.

• Journal of electromagnetic engineering and science
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• v.19 no.1
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• pp.6-12
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• 2019

An IE-FFT algorithm is implemented and applied to the electromagnetic (EM) solution of perfect electric conducting (PEC) scattering problems. The solution of the method of moments (MoM), based on the magnetic field integral equation (MFIE), is obtained for PEC objects with closed surfaces. The IE-FFT algorithm uses a uniform Cartesian grid to apply a global fast Fourier transform (FFT), which leads to significantly reduce memory requirement and speed up CPU with an iterative solver. The IE-FFT algorithm utilizes two discretizations, one for the unknown induced surface current on the planar triangular patches of 3D arbitrary geometries and the other on a uniform Cartesian grid for interpolating the free-space Green's function. The uniform interpolation of the Green's functions allows for a global FFT for far-field interaction terms, and the near-field interaction terms should be adequately corrected. A 3D block-Toeplitz structure for the Lagrangian interpolation of the Green's function is proposed. The MFIE formulation with the IE-FFT algorithm, without the help of a preconditioner, is converged in certain iterations with a generalized minimal residual (GMRES) method. The complexity of the IE-FFT is found to be approximately $O(N^{1.5})$and $O(N^{1.5}logN)$ for memory requirements and CPU time, respectively.

• The KIPS Transactions:PartB
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• v.12B no.1 s.97
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• pp.9-16
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• 2005

This paper focuses on the study of the face authentication system and the robustness of fact authentication methods under illumination changes. Four different face authentication methods are tried. These methods are as fellows; PCA(Principal Component Analysis), GMM(Gaussian Mixture Modeis), 1D HMM(1 Dimensional Hidden Markov Models), Pseudo 2D HMM(Pseudo 2 Dimensional Hidden Markov Models). Experiment results involving an artificial illumination change to fate images are compared with each other. Face feature vector extraction based on the 2D DCT(2 Dimensional Discrete Cosine Transform) if used. Experiments to evaluate the above four different fate authentication methods are carried out on the ORL(Olivetti Research Laboratory) face database. Experiment results show the EER(Equal Error Rate) performance degrade in ail occasions for the varying ${\delta}$. For the non illumination changes, Pseudo 2D HMM is $2.54{\%}$,1D HMM is $3.18{\%}$, PCA is $11.7{\%}$, GMM is $13.38{\%}$. The 1D HMM have the bettor performance than PCA where there is no illumination changes. But the 1D HMM have worse performance than PCA where there is large illumination changes(${\delta}{\geq}40$). For the Pseudo 2D HMM, The best EER performance is observed regardless of the illumination changes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.9 s.351
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• pp.53-58
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• 2006

A Vertex Shader is designed to show more 3D graphics expressions, and to increase flexibility of the fixed function T&L (Transform and Lighting) engine. Design of this Shader is based on Vertex Shader 1.1 of DirectX 8.1 and OpenGL ARB. The Vertex Shader consists of four floating point ALUs for vectors operation. The previous 32bits floating point data type is replaced to 24bits floating point data type in order to design the Vertex Shader that consume low-power and occupy small area. A Xilinx Virtex2 300M gate module is used to verify behaviour of the core. The result of Synopsys synthesis shows that the proposed Vertex Shader performs 115MHz speed at the TSMC 0.13um process and it can operate as the rate of 12.5M Polygons/sec. It shows the complexity of 110,000 gates in the same process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.1
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• pp.78-83
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• 2014

This paper suggest an effective idea to implement an low area multi-mode one dimension transform block of HEVC(High Efficiency Video Coding). The time consuming multiplier path is designed to operate on low frequency. Normal multipliers dealing with variable operands are replaced with smaller constant multipliers which do the product with constant coefficient and variable only using shifters and adders. This scheme increases total multiplier counts but entire areas are reduced owing to smaller area of constant multiplier. Idle cycles caused by doubled multipliers enable to use multi-cycle paths on the cycle eating multiplier data path. Operating frequency is lowered by multi-cycle path but total throughput is maintained. This structure is implemented with TSMC 0.18 CMOS process library, and operated on 186MHz frequency to process a 4k($3840{\times}2160$) image. Max operating frequency is 300MHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.7C
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• pp.937-945
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• 2004

A binary decision model which is used to denoising has demerits to measure the precise ratio of signal to noise because of only a binary classification. To supplement these demerits, complex statistical model and undecimated wavelet transform are generally exploited. In this paper, we propose a noise reduction method using a multi-level decision model for measuring the ratio of noise in noisy image. The propose method achieves good denoising performance with orthogonal wavelet transform because the ratio of signal to noise can be calculated to multi-valued form. In simulation results, the proposed denoising method outperforms 0.1dB in the PSNR sense than the state of art denoising algorithms using orthogonal wavelet transform.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.930-933
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• 2011

This paper addresses an adaptive postprocessing method applied in the spatial domain for block-based discrete cosine transform (BDCT) coded images. The proposed algorithm is designed by a serial concatenation of a 1D simple smoothing filter and a 2D directional filter. The 1D smoothing filter is applied according to the block type, which is determined by an adaptive threshold. It depends on local statistical properties, and updates block types appropriately by a simple rule, which affects the performance of deblocking processes. In addition, the 2D directional filter is introduced to suppress the ringing effects at the sharp edges and the block discontinuities while preserving true edges and textural information. Comprehensive experiments indicate that the proposed algorithm outperforms many deblocking methods in the literature, in terms of PSNR and subjective visual quality evaluated by GBIM.

• Proceedings of the KIEE Conference
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• summer
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• pp.607-609
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• 2004

A breakdown occurred in power transformer causes interruption of power transmission. Protective relay should be installed in transformer to detect such a fault. Protective relaying algorithm for transformer must be included a function to discriminate between winding fault and inrushing state. Recently, current differential relay is widely used to protect power transformer. However if inrush occurs in transformer, relay can be tripped by judging as internal fault. New algorithms are required in order to such problem. This study proposes a new protective relaying algorithm using Neuro-Fuzzy inference and wavelet. A variety of transformer transient states are simulated by BCTRAN and HYSDT in EMTP. D1 coefficients of differential current are obtained by wavelet transform. D1 coefficients and RMS of 3-phase primary voltage are used to make a target data and are trained by Nwo-Fuzzy algorithm which distinguishes correctly whether internal fault occurs or not within 1/2 after fault detection. It is evaluated that the results obtained by simulations can effectively protect a transformer by contact discriminating between winding fault and inrushing state.