• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.109-116
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• 2014

This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital delta-sigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of $16{\Omega}$ and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

• Journal of Korean Society of Forest Science
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• v.61 no.1
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• pp.37-44
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• 1983

This study was to estimate total annual volume growth by the measurement of mean tree growth during the last 10 years. Surveyed Forest stand was the second block (20.80 ha.)of Kyung Hee University Forests located at San 58 and 64, Gaegok-Ri, Gapyung-Yeup, Gapyung-Goon, Kyunggi province in Korea. The stand was mainly composed of uneven-aged Pinus densiflora and the estimation of tree volume was conducted by taking the cores at the D.B.H. of the sample tree which was selected by sub-sampling. The results obtained were as follows; 1) The regression between the diameter (D) and diameter growth ($\hat{I}$) was $\hat{I}=0.5499+0.0101D$. 2) The estimated equation of confidence interval for the diameter growth was $S^2{\hat{I}}=0.00817(0.09538-0.00952D+0.00027D^2$) 3) The equation for estimating tree height (H) from diameter was $H=1.32376D^{0.77958}$ 4) The equation for estimating tree volume from diameter and height $V=0.0000622D^{1.6918}H^{1.1397}$ 5) Total annual tree volume growth was $5.4041m^3/ha$, and ranged from 5.6131 to $5.1984m^3/ha$. 6) Annual growth rate of total tree volume and its error were 8.8% and 3.9%, respectively. The annual volume growth per tree for any districts can be estimated by this method, and the annual volume growth will be successfully predicted. Because of poor forest growing stock in Korea, annual amount of allowable cut should not exceed annual tree volume growth for better forest management. Accordingly, annual amount of allowable cut should be either equal to or less than annual tree volume growth for the balanced establishment between timber supply and demand in Korea. Demand shortage will be substituted with imported timber. Such plans enable Korean Government to develop a better policy of forest resources management.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.357-358
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• 2005

Compact power amplifier modules (PAM) for WCDMA/KPCS and GSM/WCDMA dual-band applications based on multilayer low temperature co-fired ceramic (LTCC) substrates are presented in this paper. The proposed modules are composed of an InGaP/GaAs HBT PAs on top of the LTCC substrates and passive components such as RF chokes and capacitors which are embedded in the substrates. The overall size of the modules is less than 6mm $\times$ 6mm $\times$ 0.8mm. The measured result shows that the PAM delivers a power of 28 dBm with a power added efficiency (PAE) of more than 30 % at KPCS band. The adjacent-channel power ratio (ACPR) at 1.25-MHz and 2.25-MHz offset is -44dBc/30kHz and -60dBc/30kHz, respectively, at 28-dBm output power. Also, the PAM for WCDMA band exhibits an output power of 27 dBm and 32-dB gain at 1.95 GHz with a 3.4-V supply. The adjacent-channel leakage ratio (ACLR) at 5-MHz and 10-MHz offset is -37.5dBc/3.84MHz and -48dBc/3.84MHz, respectively. The measured result of the GSM PAM shows an output power of 33.4 dBm and a power gain of 30.4 dB at 900MHz with a 3.5V supply. The corresponding power added efficiency (PAE) is more than 52.6 %.

• The Journal of the Korea Contents Association
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• v.10 no.2
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• pp.72-80
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• 2010

The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.34-39
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• 2016

A low-voltage, low-power analog front-end IC for neural recording implant devices is presented. The proposed IC consists of a low-noise neural amplifier and a programmable active bandpass filter to process neural signals residing in the band of 1 Hz to 5 kHz. The neural amplifier is based on a source-degenerated folded-cascode operational transconductance amplifier (OTA) for good noise performance while the following bandpass filter utilizes a low-power current-mirror based OTA with programmable high-pass cutoff frequencies from 1 Hz to 300 Hz and low-pass cutoff frequencies from 300 Hz to 8 kHz. The total recording analog front-end provides 53.1 dB of voltage gain, $4.68{\mu}Vrms$ of integrated input referred noise within 1 Hz to 10 kHz, and noise efficiency factor of 3.67. The IC is designed using $18-{\mu}m$ CMOS process and consumes a total of $3.2{\mu}W$ at 1-V supply voltage. The layout area of the IC is $0.19 mm^2$.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.90-95
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• 2014

This paper presents a VHF/UHF-band variable gain low noise amplifier for multi-standard mobile TV tuners. A proposed VHF-band variable gain amplifier is composed of a resistive shunt-feedback low noise amplifier to remove external matching components, a single-to-differential amplifier with input PMOS transcoductors to improve low frequency noise performance, a variable shunt-feedback resistor and an attenuator to control variable gain range. A proposed UHF-band variable gain amplifier consists of a narrowband low noise amplifier with capacitive tuning to improve noise performance and interference rejection performance, a single-to-differential with gm gain control and an attenuator to adjust gain control range. The proposed VHF-band and UHF-band variable gain amplifier were designed in a $0.18{\mu}m$ RF CMOS technology and draws 22 mA and 17 mA from a 1.8 V supply voltage, respectively. The designed VHF-band and UHF-band variable gain amplifier show a voltage gain of 27 dB and 27 dB, a noise figure of 1.6-1.7 dB and 1.3-1.7 dB, OIP3 of 13.5 dBm and 16 dBm, respectively.

• Journal of the Korean Institute of Gas
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• v.1 no.1
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• pp.106-112
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• 1997

This study measured the ignition limits of methane-air, propane-air, ethylene-air, and hydrogen-air mixture gases by discharge spark of D.C. power resistive circuit. The used experimental device is the IEC type spark ignition test apparatus, it consists of explosion chamber and supply -exhaust system of mixture gas. Mixture gases (methane-air, propane-air, ethylene-air, and hydrogen-air) were put into explosion chamber of IEC type spark ignition test apparatus, then it was confirmed whether ignition was made by 3,200 times of discharge spark between tungsten electrode and cadmium electrode. The ignition limits were found by increasing or decreasing the value of current. For the exact experiment, the ignition sensitivity was calibrated before and after the experiment in each condition. The ignition limits were found by changing the value of concentration of each gas-air mixture in D.C. 24 [V] resistive circuit. As the result of experiment, it was found that the minimum ignition limit currents exist at the value of methane-air 8.3 [$Vol\%$], propane-air 5.25[$Vol\%$], ethylene-air 7.8 [$Vol\%$], and hydrogen-air 21[$Vol\%$] mixture gases. For each the minimum ignition concentration of gases, the relationships between voltage and minimum ignition current were found. The results are as follows. - The minimum ignition limits are decreasing in the order of methane, propane, ethylene, and hydrogen. - The value of ignition current is inversely proportional to the value of source voltage. - The minimum ignition limit currents increase sharply at more than 2 [A]. The reason is caused by overheating the electrode.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.75-82
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• 2010

This paper presents a wideband ${\Delta}{\Sigma}$ fractional-N frequency synthesizer for a multi-band single chip CMOS RFIC transceivers. A wideband VCO utilizes a 6-bit switched capacitor array bank for 2340~3940 MHz frequency range. VCO frequency calibration circuit is designed for optimal capacitor bank code selection before phase locking process. It finishes the calibration process in $2{\mu}s$ over the whole frequency band. The LO generation block has selectable multiple division ratios of ${\div}2$, ${\div}16$, and ${\div}32$ to generate LO I/Q signals for T-DMB/DAB/FM Radio systems in L-Band (1173~1973 MHz), VHF-III (147~246 MHz), VFH-II (74~123 MHz), respectively. The measured integrated phase noise is quite low as it is lower than 0.8 degree RMS over the whole frequency band. Total locking time of the ${\Delta}{\Sigma}$ frequency synthesizer including VCO frequency calibration time is less than $50{\mu}s$. The wideband ${\Delta}{\Sigma}$ fractional-N frequency synthesizer is fabricated in $0.13{\mu}m$ CMOS technology, and it consumes 15.8 mA from 1.2 V DC supply.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.1
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• pp.19-29
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• 2003

This paper proposes a CMOS readout circuit for uncooled micro-bolometer arrays adopting a four-point step calibration technique. The proposed readout circuit employing an 11b analog-to-digital converter (ADC), a 7b digital-to-analog converter (DAC), and an automatic gain control circuit (AGC) extracts minute infrared (IR) signals from the large output signals of uncooled micro-bolometer arrays including DC bias currents, inter-pixel process variations, and self-heating effects. Die area and Power consumption of the ADC are minimized with merged-capacitor switching (MCS) technique adopted. The current mirror with high linearity is proposed at the output stage of the DAC to calibrate inter-pixel process variations and self-heating effects. The prototype is fabricated on a double-poly double-metal 1.2 um CMOS process and the measured power consumption is 110 ㎽ from a 4.5 V supply. The measured differential nonlinearity (DNL) and integrat nonlinearity (INL) of the 11b ADC show $\pm$0.9 LSB and $\pm$1.8 LSB, while the DNL and INL of the 7b DAC show $\pm$0.1 LSB and $\pm$0.1 LSB.

• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.217-218
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• 2008

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.