• Title/Summary/Keyword: 회로 설계 자동화

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FPGA Design of Automatic Checking System for Wiring Harness (하네스 배선의 검사 자동화 시스템을 위한 FPGA 설계)

  • Ryoo, Hwangyu;Kim, Jinyoung;Ryoo, Kwangki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.05a
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    • pp.558-559
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    • 2018
  • The harness wiring serves as an intermediary for transmitting the electrical signals necessary to drive the vehicle and is highly influenced by vehicle performance. Wire harness tester performs assembly test. Harness products are operated with the function of checking 0 and 1. Proceed to inspection in wire assembly process. There is a defect in the finished vehicle during use. We want to improve such defects. We design the FPGA and propose the measurement device design and the simulation result that the line and the line are disconnected by ADC precision harness inspection.

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The Study on AC Coupler for Developing Low Power PLC(Power Line Communication) Modem (저전력 전력선 통신 모뎀 개발을 위한 AC 커플러 개발)

  • Yoon, Jae-Shik;Wee, Jung-Chul;Won, Dong-Sun;Park, Chung-Ha;Song, Yong-Jae
    • Proceedings of the KIEE Conference
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    • 2007.10a
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    • pp.495-496
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    • 2007
  • 본 논문에서는 전력선 통신 모뎀에 필수적으로 사용하고 있는 AC 커플러의 대기모드 상태에서의 저전력 AC 커플러 개발에 관한 것으로, 전력선 통신(PLC : Power Line Communication) 모뎀은 디지털 가전기기를 위한 지능형 홈 네트워크 구축은 물론 원격검침 등의 각종 자동화 시스템에 활발하게 적용됨에 따라 저전력 대기모드 지원의 필요성이 요구되고 있다. 이러한 요구를 충족시키기 위해서 본 논문에서는 전력선 통신 모뎀에 필수적으로 사용하고 있는 AC 커플러의 대기모드 상태에서의 저전력 AC 커플러를 위해 1차측 AC 커플러를 송신측과 수신측으로 분리하여 설계하였다. 또한 수신 커플링 회로의 경우 현재 이용되고 있는 커플링 회로의 차단주파수를 10kHz에서 전력선 모뎀의 캐리어주파수에 영향을 미치지 않는 70kHz 고역 통과필터로 설계한다. 본 논문에서는 다양한 Simulation 및 실험을 통하여 제안된 AC 커플러가 기존 전력선 통신 모뎀과 동일한 성능을 유지하면서, 대기시 소모되는 소비전력을 크게 감소시켜, 기존 전력선 모뎀에 제안된 AC 커플러로 대치할 수 있음을 실험을 통해 규명하고 입증하였다.

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Tool for Supporting Design Pattern-Oriented Software Development (디자인 패턴지향 소프트웨어 개발 지원 도구)

  • Kim, Woon-Yong;Choi, Young-Keun
    • Journal of KIISE:Software and Applications
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    • v.29 no.8
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    • pp.555-564
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    • 2002
  • Design patterns are used to utilize well-defined design information. As using these design patterns, we can get re-use in object-oriented paradigm, decrease the time of development and improvement the quality of software. Although these design patterns are widely used among practice, most of design patterns information is manually used, inconsistent and its utilization could be very low. Because the design patterns information that a designer applies does not appear in software, it is sometimes difficult to track them. In this paper, we propose a tool support for design pattern-oriented software development. This tool supports design pattern management, software design and automatic source code generation. The design pattern management has the function for storing, managing and analyzing the existing design pattern and registering new design pattern. The software design has the function for software design with UML and automatically generate design pattern elements. By using this design information, this system can automatically generate source code. In the result to include the tracking design pattern element that is not Included In the existing CASE tools into design information, we can build the stable and efficient system that provides to analyse software, manage design pattern and automatically generate source code.

A Study on the Improvement of Capstone Design Learning Achievement through the Design and Fabrication of Pneumatic Control Circuit (공압제어회로 설계 및 제작을 통한 캡스톤 디자인 학습 성취도 향상 연구)

  • Lee, Jongkil
    • Journal of Practical Engineering Education
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    • v.12 no.1
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    • pp.1-10
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    • 2020
  • The pneumatic control circuit is an important basic element that constitutes factory automation in the era of the 4th Industrial Revolution, and the ability to design and fabricate pneumatic control circuit at the university level is one of the most important educational courses. In this study, it introduced collaborative learning by group, and capstone design technique applied to the subject of design and fabricate of pneumatic control circuit. In addition, it intends to contribute to the innovation of practical engineering education by examining the learning achievement of students. It was investigated analytical skill differences by applying cooperative learning to the experimental group and by applying traditional lecture methods to the comparison group. The experimental group that conducted cooperative learning showed higher academic ability than the comparison group that conducted only traditional lectures, and the t-test results of the significant level p<0.05 also confirmed that there were significant differences between the two groups. It was also responded 13 survey questions in four experimental groups and analyzed the results, showing a high satisfaction level of 4.731 on average. Through this study the design and fabrication of the pneumatic control circuit is more effective in improving students' learning achievement when applying the capstone design technique than when operating as a normal subject and expected to use as a basic material for the development of the curriculum of Capstone design in the future.

The Recovery Techniques on the Web Services-based e-Engineering Framework for Reliability Improvement (웹 서비스 기반 e-엔지니어링 프레임워크의 신뢰성 향상을 위한 회복 기법)

  • Kim, Dong-Uk;Kuk, Seung-Hak;Kim, Hyeon-Soo;Lee, Jai-Kyung
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.1
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    • pp.76-80
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    • 2008
  • In order to reduce a product life cycle and to improve productivity, it is required to automate the design/analysis processes. In general, since the design/analysis processes need a lot of time and resources, the various engineering resources should be integrated and utilized effectively in the distributed environments. KIMM (Korea Institute of Machinery and Materials) constructed the SOA-based e-Engineering framework to automate the execution of the design/analysis processes and to integrate the engineering resources in the distributed environments. This paper presents the concepts and the structures of the e-Engineering framework. Also it classifies the exceptional cases that will be able to occur in the e-Engineering framework and suggests the recovery techniques from the exceptional cases with viewpoints of the engineering process and the task, respectively.

A Design of a Distributed Computing Problem Solving Environment for Dietary Data Analysis (식이 데이터 분석을 위한 분산 컴퓨팅 문제풀이환경 설계)

  • Choi, Jieun;Ahn, Younsun;Kim, Yoonhee
    • Journal of KIISE
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    • v.42 no.7
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    • pp.834-839
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    • 2015
  • Recently, wellness has become an issue related to improvements in personal health and quality of life. Data that are accumulated daily, such as meals and momentum records, in addition to body measurement information such as body weight, BMI and blood pressure have been used to analyze the personal health data of an individual. Therefore, it has become possible to prevent potential disease and to analyze dietary or exercise patterns. In terms of food and nutrition, analyses are performed to evaluate the health status of an individual using dietary data. However, it is very difficult to process the large amount of dietary data. An analysis of dietary data includes four steps, and each step contains a series of iterative tasks that are executed over a long time. This paper proposes a problem solving environment that automates dietary data analysis, and the proposed framework increases the speed with which an experiment can be conducted.

Development of Hybrid Fused Deposition Modeling System for Three-Dimensional Circuit Device Fabrication (3 차원 회로 장치 제작을 위한 FDM 기반의 통합 시스템 개발)

  • O, Sung Taek;Lee, In Hwan;Kim, Ho-Chan;Cho, Hae Yong
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.38 no.8
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    • pp.869-874
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    • 2014
  • It is possible to fabricate a three-dimensional (3D) shape using the solid freeform fabrication (SFF) technology. However, there are several problems in applying conventional SFF technologies to the direct manufacturing of a product. Hence, multimaterial SFF is gaining attention. Moreover, a 3D circuit device that is different from a conventional two-dimensional PCB can also be fabricated using multimaterial SFF. In this study, a hybrid system using fused deposition modeling and direct writing was designed for 3D circuit device fabrication.

A Study on the Design of an Elevator Driving Control Circuit Using SFC Language (SFC언어를 이용한 Elevator 운전 제어회로 설계에 관한 연구)

  • Lee Sang-mun;Kim Min-Chan;Kwak Gun-Pyong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.6
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    • pp.1260-1268
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    • 2005
  • Ladder Diagram(LD) is the most extensively used among PLC standard language for the design of control system. But LD has the disadvantages for data processing and maintenance. On the other hand, the Sequential Function Chart(SFC) graphic language is very powerful for describing the sequential logic control algorithm. SFC is based on flow chart, so control flow understanding is very easy and divergence can possible improving its ability. In this paper, we propose the efficient management elevator system using the action qualifiers and choice divergence. From the result, we confirm the SFC language reduced program memory capacity and processing time is faster than LD language.

A Study on a Hardware Folw-Chart and Hardware Description Language for FSM (FSM 설계를 위한 하드웨어 흐름도와 하드웨어 기술 언어에 관한 연구)

  • Lee, Byung-Ho;Cho, Joong-Hwee;Chong, Jong-Wha
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.4
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    • pp.127-137
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    • 1989
  • This paper describes hardware flow-chart and SDL-II, which are register-transfer level, to automate logic design. Hardware flow-chart specifies behavioral and structural charaterstics of generalized FSMs (Finite State Machine) usin the modified ASM (Algorithmic State Machnine) design techniques. SDL-II describes the hardware flow-chat which specifies the control and the data path of ASIC(Application Specific IC). Also many examples are enumerated to illustrate the features of hardware flow-chart and SDL-II.

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An Efficient Parallel Testing using The Exhaustive Test Method (Exhaustive 테스트 기법을 사용한 효율적 병렬테스팅)

  • 김우완
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.3_4
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    • pp.186-193
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    • 2003
  • In recent years the complexity of digital systems has increased dramatically. Although semiconductor manufacturers try to ensure that their products are reliable, it is almost impossible not to have faults somewhere in a system at any given time. As complexity of circuits increases, the necessity of more efficient organized and automated methods for test generation is growing. But, up to now, most of popular and extensive methods for test generation nay be those which sequentially produce an output for an input pattern. They inevitably require a lot of time to search each fault in a system. In this paper, corresponding test patterns are generated through the partitioning method among those based on the exhaustive method. In addition, the method, which can discovers faults faster than other ones that have been proposed ever by inserting a pattern in parallel, is designed and implemented.