• Title/Summary/Keyword: 회로 설계 자동화

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Design and Implementation of Assessment System for SPICE Maintenance Process (SPICE 유지보수 프로세스 심사 시스템 설계 및 구현)

  • Kwon, Young-Oh;Ko, Young-Cheol;Kim, Jin-Woen;Koo, Yeon-Seol
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.2
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    • pp.141-154
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    • 2002
  • More efforts have been given to solve the problems related to computer software by process assessment. ISO/IEC 15504(SPICE) has been developed as standardized means for process assessment. The purpose of this paper is to design and implement a process assessment system which is appropriated to the Korean assessment environment based on ISO/IEC 15504. Referring documents are: IS0/1EC 15504 standardized documents, the assessment provisions of the SPICE committee in Korea, and research papers applied the existing process assessment system to real cases. Among a lot of processes, this system is designed for (ENG2). The proposed system in the paper will support the whole process of assessment, presenting the goals and end-products for each assessment step and making it possible to compose and save the product on the same screen. In determining process rating, assessors can retrieve the saved data and documents. By doing so, the system will improve reliability in process rating. The proposed system includes 7 steps of pre-assessment and 9 steps of actual assessment in order to fully prepare assessors for process assessment. And each step has been standardized to improve user-friendliness. This system is designed to provide assessors with specific details of standardized documents, the goals of the process, outcomes of implementing the process, and presentations of base practices and input/output products. Above all, the system automatically generates an assessment rating, by calculating based on input data which assessors make out. It also presents outcomes graphically.

Automated Schedulability-Aware Mapping of Real-Time Object-Oriented Models to Multi-Threaded Implementations (실시간 객체 모델의 다중 스레드 구현으로의 스케줄링을 고려한 자동화된 변환)

  • Hong, Sung-Soo
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.2
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    • pp.174-182
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    • 2002
  • The object-oriented design methods and their CASE tools are widely used in practice by many real-time software developers. However, object-oriented CASE tools require an additional step of identifying tasks from a given design model. Unfortunately, it is difficult to automate this step for a couple of reasons: (1) there are inherent discrepancies between objects and tasks; and (2) it is hard to derive tasks while maximizing real-time schedulability since this problem makes a non-trivial optimization problem. As a result, in practical object-oriented CASE tools, task identification is usually performed in an ad-hoc manner using hints provided by human designers. In this paper, we present a systematic, schedulability-aware approach that can help mapping real-time object-oriented models to multi-threaded implementations. In our approach, a task contains a group of mutually exclusive transactions that may possess different periods and deadline. For this new task model, we provide a new schedulability analysis algorithm. We also show how the run-time system is implemented and how executable code is generated in our frame work. We have performed a case study. It shows the difficulty of task derivation problem and the utility of the automated synthesis of implementations as well as the Inappropriateness of the single-threaded implementations.

Algorithms of the VLSI Layout Migration Software (반도체 자동 이식 알고리즘에 관한 연구)

  • Lee, Yun-Sik;Kim, Yong-Bae;Sin, Man-Cheol;Kim, Jun-Yeong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.10
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    • pp.712-720
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    • 2001
  • Algorithms from the research of the layout migration were proposed in the paper. These are automatic recognition algorithm for the VLSI devices from it, graph based construction algorithm to maintain the constraints, dependencies, and design rule between the devices, and high speed compaction algorithm to reduce size of the VLSI area and reuse the design with compacted size for the new technology. Also, this paper describes that why proposed algorithms are essential for the era of the SoC (System on a Chip), design reuse, and IP DB, which are the big concerns in these days. In addition to introduce our algorithms, the benchmark showed that our performance is superior by 27 times faster than that of the commercial one, and has better efficiency by 3 times in disk usage.

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Design of Embedded Processor Architecture Applicable to Mobile Multimedia (Mobile Multimedia 지원을 위한 Embedded Processor 구조 설계)

  • 이호석;한진호;배영환;조한진
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.5
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    • pp.71-80
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    • 2004
  • This paper describes embedded processor architecture design which is applicable to multimedia in mobile platform The main description is based on basic processor architecture and consideration about energy efficiency when used in mobile platform To design processor data path architecture (pipeline, branch prediction, multiple issue superscalar, function unit number) which is optimal to multimedia application and cache hierarchy and its structure, we have nut the simulation with variant architecture using MPEG4 test bench as multimedia application. We analyzed energy efficiency of architecture to check if it is applicable to mobile platform and decide basic processor architecture based on analysis result. The suggested basic processor architecture not only can be applied to mobile platform but also can be applied to basic processor architecture of configurable processor which is designed through automatic design environment.

Design and Implementation of PLC Automatic Welding System with Power-saving (전력 절약형 PLC 자동용접 시스템 설계 및 구현)

  • Yang, Young-Joon
    • Journal of Energy Engineering
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    • v.24 no.3
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    • pp.6-12
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    • 2015
  • The welding technology has been used in almost all industries such as automotive, shipbuilding, power plants and industrial machinery. In this study, the design and implementation of PLC $CO_2$ welding automation system were investigated. For these purposes, the structure analysis for driving supporter was performed and specification of automatic voltage regulator, mutual interface of system and circuit diagram were designed in order to contrive power-saving system. As the results, the stability of design for driving supporter could be convinced by numerical analysis and PLC automatic welding system was suitable for welding automation of structural-manufacturing factory capable of producing various and small amount products. Therefore, it was confirmed that PLC $CO_2$ welding automation system could contribute to productivity, stable quality and power-saving.

2-6 GHz Digital Phase Shifter Module (2-6 GHz 디지털 위상변위기 모듈)

  • Jeong, Myeong-Deuk;So, Jun-Ho;U, Byeong-Il;Im, Jung-Su;Lee, Sang-Won;Park, Dong-Cheol
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.3
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    • pp.158-164
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    • 2002
  • 2-6 GHz digital phase shifter module has been designed and fabricated. For the broadband operation and performance, MMIC phase shifter chip for phase shifter module was designed and fabricated by using the reflection-type circuits with Lange coupler. The fabricated phase shifter module shows 6.1$^{\circ}$RMS phase error, 13.5 dB maximum insertion loss, and 8 dB and 10 dB input and output return losses, respectively. Computer controlled measurement systems are realized in order to get the measured data of 32 phase states. The RMS insertion phase error and the average insertion loss deviation among 8${\times}$8 modules for the phased-array system are less than ${\pm}$0.5$^{\circ}$and ${\pm}$0.5 dB, respectively. The size of fabricated phase shifter module is 45 ${\times}$ 22.5 ${\times}$60㎣.

Design and Implementation of Minutes Summary System Based on Word Frequency and Similarity Analysis (단어 빈도와 유사도 분석 기반의 회의록 요약 시스템 설계 및 구현)

  • Heo, Kanhgo;Yang, Jinwoo;Kim, Donghyun;Bok, Kyoungsoo;Yoo, Jaesoo
    • The Journal of the Korea Contents Association
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    • v.19 no.10
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    • pp.620-629
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    • 2019
  • An automated minutes summary system is required to objectively summarize and classify the contents of discussions or discussions for decision making. This paper designs and implements a minutes summary system using word2vec model to complement the existing minutes summary system. The proposed system is further implemented with word2vec model to remove index words during morpheme analysis and to extract representative sentences with common opinions from documents. The proposed system automatically classifies documents collected during the meeting process and extracts representative sentences representing the agenda among various opinions. The conference host can quickly identify and manage all the agendas discussed at the meeting through the proposal system. The proposed system analyzes various agendas of large-scale debates or discussions and summarizes sentences that can be representative opinions to support fast and accurate decision making.

Automatic Test Report Recording Program Design and Implementation for Integration Test (통합시험을 위한 자동 시험일지 작성프로그램 설계 및 구현)

  • Jeong, Younghwan;Song, Kyoungrok;Lee, Wonsik;Wi, Sounghyouk
    • KIISE Transactions on Computing Practices
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    • v.24 no.1
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    • pp.33-39
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    • 2018
  • For the integration test in the current field of defense simulation, each actual equipment and simulator's logging information is automated. Although the event of the integrated test system is written in the test log, it is not automated, and relies on the operator's handwriting or file creation, resulting in ineffective aspects such as low-quality record content and repetition of the same content. In this study, we propose the automatic test report recording program that solves these problems. Automatic test report recording program uses framework-based technology to receive information from the test control computer and user to record a log of the test log. Automatic test report recording program allows the user to record the repeated test content in a stable manner. Additionally, even if the number of test operators is limited, the efficiency is improved so that we can fucus on the integration test.

Study on Development of Embedded HMI System for PLC Monitoring (PLC 모니터링을 위한 임베디드 HMI 시스템의 개발에 관한 연구)

  • Sun, Bok-Keun;Han, Kwang-Rok;Rim, Kee-Wook
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.42 no.4 s.304
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    • pp.1-10
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    • 2005
  • Recently, most of PLC has been using widely in automation equipment that is needed for field of industry automation. HMI is essential system for effective Control of many numbers of PLC. Even though early HMI system was consists of simple analog devices, however, HMI system could control or supervise PLC through display screen since it embeds various digital parts by development of technology in these days. HMI system consists of three parts as HMI hardware, an operating program for HMI equipment and a HMI screen editor. Among these elements, a Program for editing screen of HMI should provide various screen elements that helps users to edit each screens displayed on HMI. In this study, we design and implement screen edit program by object-oriented method for small HMI equipment and propose Prototype of embedded HMI system.

Development of Test Tool for Testing Packet Filtering Functions (패킷 필터링 기능 테스트를 위한 테스트 도구 개발)

  • Kim, Hyeon-Soo;Park, Young-Dae;Kuk, Seung-Hak
    • Journal of KIISE:Computing Practices and Letters
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    • v.13 no.2
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    • pp.86-99
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    • 2007
  • Packet filtering is to filter out potentially malicious network packets. In order to test a packet filtering function we should verify whether security policies are performed correctly as intended. However there are few existing tools to test the function. Besides, they need user participation when generating test cases or deciding test results. Many security administrators have a burden to test systematically new security policies when they establish new policies or modify the existing ones. To mitigate the burdens we suggest a new test method with minimal user articipation. Our tool automates generation steps of the test cases and the test oracles, respectively. By using the test oracles generated automatically, deciding test results is possible without user intervention. Our method realizes an automatic testing in three phases; test preparation phase, test execution, and test evaluation. As a result it may enhance confidence of test activities more highly. This paper describes the design and implementation of our test method and tool.