• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.10 s.89
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• pp.952-960
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• 2004

PSK(Phase Shift Keying) is useful because of the power and spectral efficient modulation. In this paper, no additional hardware will be needed to support various transmit mode in the suggested DSP scheme. We design and implement the synchronization algorithm for M-ary PSK(M=2, 4) demodulator based on DSP scheme, instead of complex analog PSK demodulator. TMS320C6203 is used as DSP. We check the all kinds of waveforms via the graph view window after software programming the emulation on the DSP tool. The result of implementation proves that demodulator using the suggested algorithm has equal performance with demodulator using analog circuits.

• The KIPS Transactions:PartC
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• v.15C no.1
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• pp.31-36
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• 2008

The clock frequency difference of sensor nodes is one of main parameters in TOF estimation and affect to degrade ranging algorithms to estimate positions of mobile nodes in wireless sensor networks. The specification of IEEE802.15.4a describes asynchronous TWR and SDS-TWR insensitive to frequency difference without any additional network synchronization. But the TWR and SDS-TWR can not eliminate sufficiently the effect of frequency difference of node pair, packet processing delay and its difference. Especially use of low cost oscillator with wide range offset, sensor node with different hardware and software can make the positioning errors worse. We propose an estimation method of frequency differences, and apply the measured frequency differences to TWR and SDS-TWR. We evaluate the performance of the proposed algorithm with simulation, and make certain that the proposed method enhances the performance of existing algorithms with positioning errors less than 25 cm.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.1
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• pp.89-97
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• 2007

This paper describes a load simulator with power recovery capability, which is based on the voltage source converter-inverter set. The load simulator can save the electric energy that should be consumed to test the operation and performance of the power quality compensator and the power equipment. The load simulator consists of a converter-inverter set with a DSP controller for system control and PWM pulse generation. The converter operates as a universal load to model the linear load and the non-linear load, while the inverter feed the energy back to the power source with harmonic compensation. the performance of proposed load simulator was analyzed with scaled-model experiment, interconnected with the active power filter. The experimental results confirms that the proposed load simulator can be utilized to test the performance of active power filter.

• Convergence Security Journal
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• v.21 no.2
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• pp.29-35
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• 2021

UART (Universal asynchronous receiver/transmitter) is a hardware device that converts data into serial format and transmits it, and is widely used for system diagnosis and debugging in most embedded systems. Hackers can access system memory or firmware by using the functions of UART, and can take over the system by acquiring administrator rights of the system. In this paper, we studied secure UART to protect against hacker attacks through UART. In the proposed scheme, only authorized users using the promised UART communication protocol are allowed to access UART and unauthorized access is not allowed. In addition, data is encrypted and transmitted to prevent protocol analysis through sniffing. The proposed UART technique was implemented in an embedded Linux system and performance evaluation was performed.

• Journal of Internet Computing and Services
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• v.14 no.1
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• pp.15-22
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• 2013

WAVE(Wireless Access for Vehicular Environment) is new concepts and Vehicles communications technology using for ITS(Intelligent Transportation Systems) service by IEEE standard 802.11p. Also it increases the efficiency and safety of the traffic on the road. However, the efficiency of Scrambler bit computational algorithms of OFDM modulation in WAVE systems will fall as it is not able to process in parallel in terms of hardware and software. This paper proposes an algorithm to configure 64-bits matrix table in scambler bit computation as well as an algorithm to compute 64-bits matrix table and input data in parallel. The proposed algorithm on this thesis is executed using 64-bits matrix table. In the result, the processing speed for 1 and 1000 times is improved about 40.08% ~ 40.27% and processing rate per sec is performed more than 468.35 compared to bit operation scramble. And processing speed for 1 and 1000 times is improved about 7.53% ~ 7.84% and processing rate per sec is performed more than 91.44 compared to 32-bits operation scramble. Therefore, if the 64 bit-CPU is used for 64-bits executable scramble algorithm, it is improved more than 40% compare to 32-bits scrambler.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.95-101
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• 2009

Random numbers are used in many sorts of applications. Some applications, like simple software simulation tests, communication protocol verifications, cryptography verification and so forth, need various levels of randomness with various process speeds. In this paper, we propose a fast pseudorandom generator module for embedded systems. The generator module is implemented in hardware which can run in two modes, one of which can generate random numbers with higher randomness but which requires six cycles, the other providing its result within one cycle but with less randomness. An ASIP (Application Specific Instruction set Processor) was designed to implement the proposed pseudorandom generator instruction sets. We designed a processor based on the MIPS architecture,, by using LISA, and have run statistical tests passing the sequence of the Diehard test suite. The HDL models of the processor were generated using CoWare's Processor Designer and synthesized into the Dong-bu 0.18um CMOS cell library using the Synopsys Design Compiler. With the proposed pseudorandom generator module, random number generation performance was 239% faster than software model, but the area increased only 2.0% of the proposed ASIP.

• Journal of the Korea Society of Computer and Information
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• v.19 no.3
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• pp.1-9
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• 2014

In this paper, we design and implement location information system and user mapping system using DSDV(Destination Sequenced Distance Vector) routing algorithm in ad-hoc network environment to efficient manage a number of mobile devices. The software part in proposed system construct ad-hoc network using DSDV routing algorithm and it activate alarm system, such as vibration, when one of devices disappears in the network. The hardware system, called u_LIN (User Location Information Node) construct ad-hoc network and it helps to find a disappeared device by using warning system. When we evaluate the performance of our prototype system, we have checked a correct operation, within the range of 250m in case of 1:1 communication and within the range of 100m in case of 1:N communication. The implemented system in this paper is highly expected to flexibly use in juvenile protection system, stray-child protection system, tourist guide system and so on.

• The KIPS Transactions:PartD
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• v.12D no.7 s.103
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• pp.1049-1064
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• 2005

The demands of increasingly complicated software have led to the proliferation of object-oriented design methodologies in embedded systems. To execute a system designed with objects in target hardware, a task set should be derived from the objects, representing how many tasks reside in the system and which task processes which event arriving at an object. The derived task set greatly influences the responsiveness of the system. Nevertheless, it is very difficult to derive an optimal task set due to the discrepancy between objects and tasks. Therefore, the common method currently used by developers is to repetitively try various task sets. This paper proposes Scenario-based Implementation Synthesis Architecture (SISA) to solve this problem. SISA encompasses a method for deriving a task set from a system designed with objects as well as its supporting development tools and run-time system architecture. A system designed with SISA not only consists of the smallest possible number of tasks, but also guarantees that the response time for each event in the system is minimized. We have fully implemented SISA by extending the ResoRT development tool and applied it to an existing industrial PBX system. The experimental results show that maximum response times were reduced $30.3\%$ on average compared to when the task set was derived by the best known existing methods.

• Journal of Sensor Science and Technology
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• v.6 no.6
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• pp.476-482
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• 1997

A portable electronic nose system has been fabricated and characterized using an oxide semiconductor gas sensor array and pattern recognition techniques such as principal component analysis and back-propagation artificial neural network. The sensor array consists of six thick-film gas sensors whose sensing layers are Pd-doped $WO_{3}$, Pt-doped $SnO_{2}$, $TiO_{2}-Sb_{2}O_{5}-Pd$-doped $SnO_{2}$, $TiO_{2}-Sb_{2}O_{5}-Pd$-doped $SnO_{2}$ + Pd coated layer, $Al_{2}O_{3}$-doped ZnO and $PdCl_{2}$-doped $SnO_{2}$. The portable electronic nose system consists of an 16bit Intel 80c196kc as CPU, an EPROM for storing system main program, an EEPROM for containing optimized connection weights of artificial neural network, an LCD for displaying gas concentrations. As an application the system has been used to identify 26 carbon monoxide/hydrocarbon (CO/HC) car exhausting gases in the concentration range of CO 0%/HC 0 ppm to CO 7.6%/HC 400 ppm and the identification has been successfully demonstrated.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.1
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• pp.90-98
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• 1998

This paper is to describe the improved vector control which can control the induction motor robustly in low speed. When the induction motor is drived with low speed, below 10 percent of the rated speed, an algorithm which can compensate the error of unit vector angle generated by the harmonics is proposed. Another algorithm which can be tuned to the rotor time constant so that nay be robust to the rotor parameter change in low speed and transient state was proposed. The ripple of flux and torque was reduced by the proposed vector control and then the stable output characteristics was obtained in low speed. When the input and output is sinusoidal, the proposed vector control, the direct vector control and the indirect vector control were analyzed and compared in the low speed characteristics. And each control characteristics is compared and analyzed in state of containing harmonics. The estimation and tunning performance of rotor time constant is confirmed with simulation. The whole control system is implemented by real hardware and experimented to compare the proposed vector control with the direct vector control. As a result of the experiment with two control methods in low speed, the torque ripple of the proposed vector control is improved by 45 percent than the direct vector control. And it is confirmed that the flux current ripple is reduced in 0.2 p.u. and torque current ripple is reduced in 0.6 p.u. It is confirmed that the rotor time constant by the estimation and the tunning algorithm is tunned by the real rotor time constant. Finally, it was confirmed that the validity and robustness for the proposed vector control in low speed existed.