• Title/Summary/Keyword: 프로세서

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Direction-Embedded Branch Prediction based on the Analysis of Neural Network (신경망의 분석을 통한 방향 정보를 내포하는 분기 예측 기법)

  • Kwak Jong Wook;Kim Ju-Hwan;Jhon Chu Shik
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.42 no.1
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    • pp.9-26
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    • 2005
  • In the pursuit of ever higher levels of performance, recent computer systems have made use of deep pipeline, dynamic scheduling and multi-issue superscalar processor technologies. In this situations, branch prediction schemes are an essential part of modem microarchitectures because the penalty for a branch misprediction increases as pipelines deepen and the number of instructions issued per cycle increases. In this paper, we propose a novel branch prediction scheme, direction-gshare(d-gshare), to improve the prediction accuracy. At first, we model a neural network with the components that possibly affect the branch prediction accuracy, and analyze the variation of their weights based on the neural network information. Then, we newly add the component that has a high weight value to an original gshare scheme. We simulate our branch prediction scheme using Simple Scalar, a powerful event-driven simulator, and analyze the simulation results. Our results show that, compared to bimodal, two-level adaptive and gshare predictor, direction-gshare predictor(d-gshare. 3) outperforms, without additional hardware costs, by up to 4.1% and 1.5% in average for the default mont of embedded direction, and 11.8% in maximum and 3.7% in average for the optimal one.

Multi-Threaded Parallel H.264/AVC Decoder for Multi-Core Systems (멀티코어 시스템을 위한 멀티스레드 H.264/AVC 병렬 디코더)

  • Kim, Won-Jin;Cho, Keol;Chung, Ki-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.11
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    • pp.43-53
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    • 2010
  • Wide deployment of high resolution video services leads to active studies on high speed video processing. Especially, prevalent employment of multi-core systems accelerates researches on high resolution video processing based on parallelization of multimedia software. In this paper, we propose a novel parallel H.264/AVC decoding scheme on a multi-core platform. Parallel H.264/AVC decoding is challenging not only because parallelization may incur significant synchronization overhead but also because software may have complicated dependencies. To overcome such issues, we propose a novel approach called Multi-Threaded Parallelization(MTP). In MTP, to reduce synchronization overhead, a separate thread is allocated to each stage in the pipeline. In addition, an efficient memory reuse technique is used to reduce the memory requirement. To verify the effectiveness of the proposed approach, we parallelized FFmpeg H.264/AVC decoder with the proposed technique using OpenMP, and carried out experiments on an Intel Quad-Core platform. The proposed design performs better than FFmpeg H.264/AVC decoder before the parallelization by 53%. We also reduced the amount of memory usage by 65% and 81% for a high-definition(HD) and a full high-definition(FHD) video, respectively compared with that of popular existing method called 2Dwave.

Design of movable Tracking System using CDS Type Sensor (CDS센서를 이용한 이동 가능형 태양추적시스템 설계)

  • Sim, Myung-Gyu;Ji, Un-Ho;Chun, Soon-Yong
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.47 no.6
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    • pp.6-11
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    • 2010
  • Amount of power generated from solar photovoltaic can vary according to solar flux of sunlight due to nature of solar cell panel, and an angle that the sun and the surface of cell makes brings difference in amount of power generation. Solar flux is decided by location of surface of the Earth that is classified into longitude and latitude, but on the other hand, an angle that the sung and the surface of cell makes can be changed by changing the angle of a solar power generation device at the fixed location. A method of changing the angle of a solar power generation device as a measure for improving practical power generation efficiency. and studies about a solar tracking device for this are in active. This study conducted a research on a solar tracking system for improvement of solar power generation efficiency. A solar tracking system of this study is composed of a sensor part to confirm a location of the sun with a semiconductor photosensor using the photo conductive effect, and it analyzed output signal of a sensor by using microprocessor and it produced a control signal of driving part for tracking the sun. A solar power generator (25W) was produced to analyze performance of a solar tracking system and usefulness of a solar tracking device that was designed and produced in this study was confirmed through experiments.

Scheduling Algorithm using DAG Leveling in Optical Grid Environment (옵티컬 그리드 환경에서 DAG 계층화를 통한 스케줄링 알고리즘)

  • Yoon, Wan-Oh;Lim, Hyun-Soo;Song, In-Seong;Kim, Ji-Won;Choi, Sang-Bang
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.4
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    • pp.71-81
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    • 2010
  • In grid system, Task scheduling based on list scheduling models has showed low complexity and high efficiency in fully connected processor set environment. However, earlier schemes did not consider sufficiently the communication cost among tasks and the composition process of lightpath for communication in optical gird environment. In this thesis, we propose LSOG (Leveling Selection in Optical Grid) which sets task priority after forming a hierarchical directed acyclic graph (DAG) that is optimized in optical grid environment. To determine priorities of task assignment in the same level, proposed algorithm executes the task with biggest communication cost between itself and its predecessor. Then, it considers the shortest route for communication between tasks. This process improves communication cost in scheduling process through optimizing link resource usage in optical grid environment. We compared LSOG algorithm with conventional ELSA (Extended List Scheduling Algorithm) and SCP (Scheduled Critical Path) algorithm. We could see the enhancement in overall scheduling performance through increment in CCR value and smoothing network environment.

Gameplay Experience as A Problem Solving - Towards The New Rule Spaces - (문제해결로서의 게임플레이 경험 - 새로운 법칙공간을 중심으로 -)

  • Song, Seung-Keun
    • Journal of Korea Game Society
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    • v.9 no.5
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    • pp.25-41
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    • 2009
  • The objective of this study is to develop an analytic framework to code systematically the gamer's behaviour in MMO(Massively Multi-player Online) gameplay experience, to explore their gameplay as a problem solving procedure empirically. Previous studies about model human processor, content based protocol, and procedure based protocol are reviewed in order to build the outline of the analytic framework related to MMO gameplay. The specific gameplay actions and contents were derived by using concurrent protocol analysis method through the empirical experiment executed in MMORPG gameplay. Consequently, gameplay are divided into six actions : kinematics, perception, function, representation, simulation, and rule (heuristics, following, and transcedence). The analytic framework suitable for MMO gameplay was built. As a result of this study, we found three rule spaces in the problem solving domain of gameplay that are an heuristics, a following of the rule, and a transcendence of the rule. 'Heuristics' denotes the rule action that discovers the rule of game through trial-and-error. 'Following' indicates the rule action that follows the rule of game embedded in game by game designers. 'Transcendence' presents the rule action that transcends that. The new discovered rule spaces where 'Following' and 'Transcendence' actions occur and the gameplay pattern in them is provided with the key basis to determine the level design elements of MMO game, such as terrain feature, monster attribute, item, and skill et cetera. Therefore, this study is concludes with key implications to support game design to improve the quality of MMO game product.

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Multi-FNN Identification by Means of HCM Clustering and ITs Optimization Using Genetic Algorithms (HCM 클러스터링에 의한 다중 퍼지-뉴럴 네트워크 동정과 유전자 알고리즘을 이용한 이의 최적화)

  • 오성권;박호성
    • Journal of the Korean Institute of Intelligent Systems
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    • v.10 no.5
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    • pp.487-496
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    • 2000
  • In this paper, the Multi-FNN(Fuzzy-Neural Networks) model is identified and optimized using HCM(Hard C-Means) clustering method and genetic algorithms. The proposed Multi-FNN is based on Yamakawa's FNN and uses simplified inference as fuzzy inference method and error back propagation algorithm as learning rules. We use a HCM clustering and Genetic Algorithms(GAs) to identify both the structure and the parameters of a Multi-FNN model. Here, HCM clustering method, which is carried out for the process data preprocessing of system modeling, is utilized to determine the structure of Multi-FNN according to the divisions of input-output space using I/O process data. Also, the parameters of Multi-FNN model such as apexes of membership function, learning rates and momentum coefficients are adjusted using genetic algorithms. A aggregate performance index with a weighting factor is used to achieve a sound balance between approximation and generalization abilities of the model. The aggregate performance index stands for an aggregate objective function with a weighting factor to consider a mutual balance and dependency between approximation and predictive abilities. According to the selection and adjustment of a weighting factor of this aggregate abjective function which depends on the number of data and a certain degree of nonlinearity, we show that it is available and effective to design an optimal Multi-FNN model. To evaluate the performance of the proposed model, we use the time series data for gas furnace and the numerical data of nonlinear function.

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The Early Write Back Scheme For Write-Back Cache (라이트 백 캐쉬를 위한 빠른 라이트 백 기법)

  • Chung, Young-Jin;Lee, Kil-Whan;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.101-109
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    • 2009
  • Generally, depth cache and pixel cache of 3D graphics are designed by using write-back scheme for efficient use of memory bandwidth. Also, there are write after read operations of same address or only write operations are occurred frequently in 3D graphics cache. If a cache miss is detected, an access to the external memory for write back operation and another access to the memory for handling the cache miss are operated simultaneously. So on frequent cache miss situations, as the memory access bandwidth limited, the access time of the external memory will be increased due to memory bottleneck problem. As a result, the total performance of the processor or the IP will be decreased, also the problem will increase peak power consumption. So in this paper, we proposed a novel early write back cache architecture so as to solve the problems issued above. The proposed architecture controls the point when to access the external memory as to copy the valid data block. And this architecture can improve the cache performance with same hit ratio and same capacity cache. As a result, the proposed architecture can solve the memory bottleneck problem by preventing intensive memory accesses. We have evaluated the new proposed architecture on 3D graphics z cache and pixel cache on a SoC environment where ARM11, 3D graphic accelerator and various IPs are embedded. The simulation results indicated that there were maximum 75% of performance increase when using various simulation vectors.

A Study on the Parallel Routing in Hybrid Optical Networks-on-Chip (하이브리드 광학 네트워크-온-칩에서 병렬 라우팅에 관한 연구)

  • Seo, Jung-Tack;Hwang, Yong-Joong;Han, Tae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.8
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    • pp.25-32
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    • 2011
  • Networks-on-chip (NoC) is emerging as a key technology to overcome severe bus traffics in ever-increasing complexity of the Multiprocessor systems-on-chip (MPSoC); however traditional electrical interconnection based NoC architecture would be faced with technical limits of bandwidth and power consumptions in the near future. In order to cope with these problems, a hybrid optical NoC architecture which use both electrical interconnects and optical interconnects together, has been widely investigated. In the hybrid optical NoCs, wormhole switching and simple deterministic X-Y routing are used for the electrical interconnections which is responsible for the setup of routing path and optical router to transmit optical data through optical interconnects. Optical NoC uses circuit switching method to send payload data by preset paths and routers. However, conventional hybrid optical NoC has a drawback that concurrent transmissions are not allowed. Therefore, performance improvement is limited. In this paper, we propose a new routing algorithm that uses circuit switching and adaptive algorithm for the electrical interconnections to transmit data using multiple paths simultaneously. We also propose an efficient method to prevent livelock problems. Experimental results show up to 60% throughput improvement compared to a hybrid optical NoC and 65% power reduction compared to an electrical NoC.

Development of a Multi-step Stamping Process for the Effective Fabrication of a Thin Sheet for High Aspect Ratio Corrugated Structures (고세장비 연속주름을 갖는 박판구조물 제작을 위한 다단성형공정 개발)

  • Choi, Sung-Woo;Park, Sang-Hu;Jeong, Ho-Seung;Min, June-Kee;Jeong, Jae-Hun;Cho, Jong-Rae;Kim, Hyun-June;Willians, Paul
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.34 no.2
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    • pp.219-226
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    • 2010
  • The stamping process is widely used in fabricating various sheet-parts for vehicle, airplane, and electronic devices due to its low processing cost and high productivity. Recently the use of thin sheets with corrugated structures has rapidly increased for the production of energy devices, e.g., heat exchangers and fuel cells. However, it is very difficult to make corrugated structures directly in the stamping process due to their geometrical complexity. To solve this problem, this paper proposes a multi-step stamping process with a combined heat treatment process: a sequence of the first stamping, heat treatment, and second stamping. By multi-stamping, we obtained successful results in fabricating very thin corrugated structures with thicknesses of $100{\mu}m$; these are applicable as part of a plate-type heat exchanger.

Miniaturized Ground-Detection Sensor using a Geomagnetic Sensor for an Air-burst Munition Fuze (공중폭발탄용 신관에 적용 가능한 초소형 지자기 지면감지 센서)

  • LEE, HanJin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.5
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    • pp.97-105
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    • 2017
  • An air-burst munition is limited in space, so there is a limit on the size of the fuze and the amount of ammunition. In order to increase a firepower to a target with limited ammunition, it is necessary to concentrate the firepower on the ground instead of the omnidirectional explosion after flying to the target. This paper explores the design and verification of a ground-detection sensor that detects the direction of the ground and determines the flight-distance of an air-burst munition using a single axis geomagnetic sensor. Prior to the design of the ground detection sensor, a geomagnetic sensor model mounted on the spinning air-burst munition is analyzed and a ground-detection algorithm by simplifying this model is designed. A high speed rotating device to simulate a rotation environment is designed and a geomagnetic sensor and a remote-recording system are fabricated to obtain geomagnetic data. The ground detection algorithm is verified by post-processing the acquired geomagnetic data. Taking miniaturization and low-power into consideration, the ground detection sensor is implemented with analog devices and the processor. The output signal of the ground detection sensor rotating at an arbitrary rotation speed of 200 Hz is connected to the LED (Light Emitting Diode) in the high speed rotating device and the ground detection sensor is verified using a high-speed camera.