• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.4
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• pp.752-757
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• 2016

Machine to Machine (M2M) communications is communications between a business application and devices via a communication network without any direct human interaction. The aim of our research is to connect any M2M device with an M2M AS (Application server) through an IMS (IP Multimedia Subsystem) Network Core using a M2M Gateway, in order to develop an M2M Horizontal Services Platform over IMS. An IP Multimedia Subsystem (IMS) is an architectural framework defined by the wireless standards body of the 3rd Generation Partnership Project (3GPP) for delivering IP multimedia services to mobile users. This paper shows the design and implementation of a Horizontal M2M Network Services Platform over an IP Multimedia Subsystem (IMS) using the Message Session Relay Protocol (MSRP). We summarize the protocols and architectures that formed the basis for the creation of our architecture. We provide a detailed description of our architecture design, describing the call flow of the proposed architecture and the entities operating in each process. We also describe the design and implementation process detailing the different tools used, explaining the selection of each component and its importance; also how we designed and implemented the M2M gateway, M2M Application Server, Open IMS Core, business application and M2M devices.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.10
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• pp.36-42
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• 2010

FFT(Fast Fourier Transform) processor is one of the key components in the implementation of OFDM systems for many wireless standards such as IEEE 802.22. To improve the performances of FFT processors, various studies have been carried out to reduce the complexities of multipliers, memory interface, control schemes and so on. While the number of FFT stages increases logarithmically $log_2N$) as the FFT point-size (N) increases, the number of required registers (or, memories) increases linearly. In large point-size FFT designs, the registers occupy more than 70% of the chip area. In this paper, to reduce the memory size of IFFT for OFDM transmitters, we propose a new IFFT design method based on a combined mapping of modulated data, pilot and null signals. The proposed method focuses on reducing the sizes of the registers in the first two stages of the IFFT architectures since the first two stages require 75% of the total registers. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 38.5% area reduction compared with previous IFFT designs.

• Convergence Security Journal
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• v.2 no.1
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• pp.87-97
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• 2002

Many firms are utilizing the Internet and various information technologies to effectively manage their business operations with a goal of gaining a competitive advantage in the rapidly changing business environments. Today, the business is characterized as digital economy where information freely flows and business processes are improved with the use of information technologies. Internet technology is playing a key role in transforming the organization and creating new business models. It has become the infrastructure of choice for electronic commerce because it provides process efficiency, cost reduction, and open standards that can easily be adopted by different organizations. Here, the vast amount of data and information slow among the related parties and security issues are very critical matter of research interests by academicians and practitioners. In this research, we address the importance of security framework in managing the data shared among the related parties in the e-business and suggest the security architecture for effectively supporting the needs of e-business in an organization. This research provides valuable contributions both in academics and industry in terms of how security framework and architecture should be set in order to provide the necessary e-business.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.2
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• pp.149-156
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• 2005

The HLA is the simulation architecture standard that the civilian and military simulation communities are deeply interested in. We can find various successful practices applying HLA to constructive simulations such as war games in domestics and overseas. However, any case of real-time distributed simulations has not been reported. The reason is that a message transmission period via RTI in a network layer varies according to computing power, simulation nodes, transmission types, and packet size; further a message processing time in an application layer depends on its processing methods, thus too difficult to set up real-time constraints for the enhancement of a real-time resolution. Hence, in this paper we have studied the real-time constraints of RTI for the development of the M-SAM simulator. Thus we have developed a HLA based pilot simulator using 6 PC's in LAN and then measured and analysed the performance of the RTI. As the results of our work, we could obtain the quantitative values for message delay, RTI overhead and RTI packet transmission ratio by a real operation scenario and loads, which are not shown in the previous works. We also expect that the results can be used as a guideline to set up the number of targets, transmission frequency and message processing method in the development of the M-SAM simulator and similar applications.

• The KIPS Transactions:PartD
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• v.15D no.2
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• pp.235-246
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• 2008

Service-Oriented Architecture (SOA) is emerging as an effective approach for developing applications by dynamically discovering and composing reusable services. Generally, the benefits of SOA are known as low-development cost, high agility, high scalability, business level reuse, etc. However, a representative problem for widely applying SOA is the performance problem. This is caused by the nature of SOA such as service deployment and execution in distributed environment, heterogeneity of service platforms, use of a standard message format, etc. Therefore, performance problem has to be overcome to effectively apply SOA, and service performance has to be measured precisely to analyze where and why the problem has occurred. Prerequisite for this is a definition of a quality model to effectively measure service performance. However, current works on service performance lacks in defining a practical and precise quality model for measuring performance which adequately addresses the execution environment and features of SOA. Hence, in this paper, we define a quality model which includes a set of practical metrics for measuring service performance and an effective technique to measure the value of the proposed metrics. In addition, we apply the metrics for Hotel Reservation Service System (HRSS) to show the practicability and usefulness of the proposed metrics.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.5
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• pp.349-361
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• 2021

With the development of technology and the advancement of weather forecasting models and prediction methods, higher performance weather forecasting software has been developed, and more precise and accurate weather forecasting is possible by performing software using supercomputers. In this paper, the weather forecast model used by six major countries is investigated and its characteristics are analyzed, and the Korea Meteorological Administration currently uses it in collaboration with the UK Meteorological Administration since 2012 and explains the GloSea However, the existing GloSea was conducted only on the Meteorological Administration supercomputer, making it difficult for various researchers to perform detailed research by specialized field. Therefore, this paper aims to establish a standard experimental environment in which the low-resolution version based on GloSea6 currently used in Korea can be used in local systems and test it to present the localization of low-resolution GloSea6 that can be performed in the laboratory environment. In other words, in this paper, the local portability of low-resolution Globe6 is verified by establishing a basic architecture consisting of a user terminal-calculation server-repository server and performing execution tests of the software.

• KIPS Transactions on Software and Data Engineering
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• v.9 no.12
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• pp.387-402
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• 2020

Conventional automotive development has mainly focused on ensuring correctness and safety and security has been relatively neglected. However, as the number of automotive hacking cases has increased due to the increased Internet connectivity of automobiles, international organizations such as the United Nations Economic Commission for Europe(UNECE) are preparing cybersecurity regulations to ensure security for automotive development. As with other IT products, automotive cybersecurity regulation also emphasize the concept of "Security by Design", which considers security from the beginning of development. In particular, since automotive development has a long lifecycle and complex supply chain, it is very difficult to change the architecture after development, and thus Security by Design is much more important than existing IT products. The problem, however, is that no specific methodology for Security by Design has been proposed on automotive development process. This paper, therefore, proposes a specific methodology for Security by Design on Automotive development. Through this methodology, automotive manufacturers can simultaneously consider aspects of functional safety, and security in automotive development process, and will also be able to respond to the upcoming certification of UNECE automotive cybersecurity regulations.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.06a
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• pp.148-155
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• 2002

Multithreaded models improve the efficiency of parallel systems by combining inner parallelism, asynchronous data availability and the locality of von Neumann model. This model executes thread code which is generated by compiler and of which quality is given by the method of generation. But multithreaded models have the demerit that execution model is restricted to a specific platform. On the contrary, Java has the platform independency, so if we can translate from threads code to Java bytecode, we can use the advantages of multithreaded models in many platforms. Java executes Java bytecode which is intermediate language format for Java virtual machine. Java bytecode plays a role of an intermediate language in translator and Java virtual machine work as back-end in translator. But, Java bytecode which is translated from multithreaded models have the demerit that it is not secure. This paper, multhithread code whose feature of platform independent can execute in java virtual machine. We design and implement translator which translate from thread code of multithreaded code to Java bytecode and which check secure problems from Java bytecode.