• Proceedings of the Korean Society of Computer Information Conference
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• 2021.07a
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• pp.1-2
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• 2021

3D NAND 플래시 메모리는 플래너(2D) NAND 셀을 적층하는 방식으로 단위 면적당 고용량을 제공한다. 하지만 적층 공정의 특성상 각 레이어별 또는 셀 위치에 따라 오류 발생 빈도가 달라질 수 있는 문제가 있다. 이와 같은 현상은 플래시 메모리의 쓰기/지우기(P/E) 횟수가 증가할 수록 두드러진다. SSD와 같은 대부분의 플래시 기반 저장장치는 오류 교정을 위하여 ECC를 사용한다. 이 방법은 모든 플래시 메모리 페이지에 대하여 고정된 보호 강도를 제공하므로 물리적 위치에 따라 에러 발생률이 각기 다르게 나타나는 3D NAND 플래시 메모리에서는 한계를 보인다. 따라서 본 논문에서는 오류 발생률 차이를 보이는 페이지와 레이어를 분류하여 각 영역별로 차별화된 보호강도를 적용한다. 우리는 페이지와 레이어별로 오류 발생률이 현저하게 달라지는 3K P/E 사이클에서 측정된 오류율을 바탕으로 페이지와 레이어를 분류하고 오류에 취약한 영역에 대해서는 패리티 데이터를 추가하여 차별화된 보호 강도를 제공한다. 오류 발생 횟수에 따른 영역 구분을 위하여 K-Means 머신러닝 알고리즘을 사용한다. 우리는 이와 같은 차별화된 보호정책이 3D NAND 플래시 메모리의 신뢰성과 수명향상에 기여할 수 있는 가능성을 보인다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.6C
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• pp.368-375
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• 2011

In the distributed video coding system, the parity bits, which are generated in encoders, are used to reconstruct Wyner-Ziv frames. Since the original Wyner-Ziv frames are not known in decoders, the efficient correlation noise modeling for turbo or LDPC code is necessary. In this paper, an efficient correlation noise modeling method is proposed and the performance is analyzed. The method to estimate the quantization parameters for key frames, which are encoded using H.264 intraframe coding technique, is also proposed. The performance of the proposed system is evaluated by extensive computer simulations.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.156-163
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• 2012

Recently, Information Hiding Technology are becoming increasingly demanding in the field of international security, military and medical image This paper proposes data hiding technique utilizing parity checker for gray level image. many researches have been adopted LSB substitution and XOR operation in the field of steganography for the low complexity, high embedding capacity and high image quality. But, LSB substitution methods are not secure through it's naive mechanism even though it achieves high embedding capacity. Proposed method replaces LSB of each pixel with XOR(between the parity check bit of other 7 MSBs and 1 Secret bit) within one pixel. As a result, stego-image(that is, steganogram) doesn't result in high image degradation. Eavesdropper couldn't easily detect the message embedding. This approach is applying the concept of symmetric-key encryption protocol onto steganography. Furthermore, 1bit of symmetric-key is generated by the self-reference of each pixel. Proposed method provide more 25% embedding rate against existing XOR operation-based methods and show the effect of the reversal rate of LSB about 2% improvement.

• Journal of KIISE:Computing Practices and Letters
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• v.8 no.6
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• pp.736-745
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• 2002

In network delivery of compressed video, packets may be lost if the channel is unreliable like Internet. Such losses tend to of cur in burst like continuous bit-stream error. In this paper, we propose an effective error-concealment approach to which an error resilient video encoding approach is applied against burst errors and which reduces a complexity of error concealment at the decoder using data hiding. To improve the performance of error concealment, a temporal and spatial error resilient video encoding approach at encoder is developed to be robust against burst errors. For spatial area of error concealment, block shuffling scheme is introduced to isolate erroneous blocks caused by packet losses. For temporal area of error concealment, we embed parity bits in content data for motion vectors between intra frames or continuous inter frames and recovery loss packet with it at decoder after transmission While error concealment is performed on error blocks of video data at decoder, it is computationally costly to interpolate error video block using neighboring information. So, in this paper, a set of feature are extracted at the encoder and embedded imperceptibly into the original media. If some part of the media data is damaged during transmission, the embedded features can be extracted and used for recovery of lost data with bi-direction interpolation. The use of data hiding leads to reduced complexity at the decoder. Experimental results suggest that our approach can achieve a reasonable quality for packet loss up to 30% over a wide range of video materials.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.6
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• pp.17-26
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• 2008

In this paper, we propose a distributed multi-view video coding method employing illumination compensation for multi-view video coding. Distributed multi-view video coding (DMVC) methods can be classified either into a temporal or an inter-view interpolation-based ones according to ways to generate side information. DMVC with inter-view interpolation utilizes characteristics of multi-view videos to improve coding efficiency of the DMVC by using side information based on the inter-view interpolation. However, mismatch of camera parameters and illumination change between two views could bring about inaccurate side information generation. In this paper, a modified distributed multi-view coding method is presented by applying illumination compensation in generating the side information. In the proposed encoder system, in addition to parity bits for AC coefficients, DC coefficients are transmitted as well to the decoder side. By doing so, the decoder can generate more accurate side information by compensating illumination changes with the transmitted DC coefficients. We found that the proposed algorithm is $0.1{\sim}0.2\;dB$ better than the conventional algorithm that does not make use of illumination compensation.

• Journal of The Korean Association of Information Education
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• v.21 no.2
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• pp.209-217
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• 2017

Recently SW education has been emphasized in Korea, but many students do not have many opportunities to learn computer science. In this paper, I organized a computer science show to enhance interest and understanding of computer science. The computer science show consisted of understanding binary systems, send a text message, parity bit magic, finding a number card, and collecting colors (orange games). I applied the computer science show to elementary school students and looked at the results. Most of the students who participated in computer science shows did not have an "participation experience of computer science shows". As result of surveys, many students answered "I am interesting about computer science shows," "I am interested in computer science," and "I would recommend it to my friends nearby." Through research, I learned that computer science shows are a way for elementary students to draw interest in computer science and to create curiosity and interest in computer science. I found from research that computer science shows are a way to reduce students' learning burdens and to increase interest in computer science.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.9
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• pp.750-758
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• 2013

In this paper, we introduce the low-density parity-check (LDPC) coded orthogonal frequency division multiplexing (OFDM) subframe reordering scheme for achieving equal combined power allocation in type I hybrid automatic repeat request (H-ARQ) systems and analyze the performance improvement by using the channel capacity. Also, it is confirmed that the layered decoding for subframe reordering scheme in H-ARQ systems gives faster convergence speed. It is verified from numerical analysis that a subframe reordering pattern having larger channel capacity shows better bit error rate (BER) performance. Therefore the subframe reordering pattern achieving equal combined power allocation for each subframe maximizes the channel capacity and outperforms other subframe reordering patterns. Also, it is shown that the subframe reordering scheme for achieving equal combined power allocation gives better performance than the conventional Chase combining scheme without increasing the decoding complexity.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2783-2790
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• 2010

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard, require a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithms for LDPC codes. First, sequential decoding with partial group is proposed. It has the same H/W complexity, and fewer number of iterations are required with the same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method reduces number of unnecessary iterations. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme. The LDPC decoder have been implemented in Xilinx System Generator and targeted to a Xilinx Virtx5-xc5vlx155t FPGA. When three algorithms are used, amount of device is about 45% off and the decoding speed is about two times faster than convectional scheme.

• Journal of the Korea Society of Computer and Information
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• v.26 no.11
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• pp.1-9
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• 2021

3D-NAND flash memory provides high capacity per unit area by stacking 2D-NAND cells having a planar structure. However, due to the nature of the lamination process, there is a problem that the frequency of error occurrence may vary depending on each layer or physical cell location. This phenomenon becomes more pronounced as the number of write/erase(P/E) operations of the flash memory increases. Most flash-based storage devices such as SSDs use ECC for error correction. Since this method provides a fixed strength of data protection for all flash memory pages, it has limitations in 3D NAND flash memory, where the error rate varies depending on the physical location. Therefore, in this paper, pages and layers with different error rates are classified into clusters through the K-means machine learning algorithm, and differentiated data protection strength is applied to each cluster. We classify pages and layers based on the number of errors measured after endurance test, where the error rate varies significantly for each page and layer, and add parity data to stripes for areas vulnerable to errors to provides differentiate data protection strength. We show the possibility that this differentiated data protection policy can contribute to the improvement of reliability and lifespan of 3D NAND flash memory compared to the protection techniques using RAID-like or ECC alone.