• Journal of the Korea Institute of Information Security & Cryptology
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• v.22 no.2
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• pp.201-211
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• 2012

This paper addresses a Full Disk Encryption hardware processor for SATA HDD in a single FPGA design, and shows its experimental result using an FPGA board. The proposed processor mainly consists of two blocks: the first block processes XTS-AES block cipher which is the IEEE P1619 standard of storage media encryption and the second block executes the interface between SATA Host (PC) and Device (HDD). To minimize the performance degradation, we designed the XTS-AES block with the 4-stage pipelined structure which can process a 128-bit block per 4 clock cycles and has 4.8Gbps (max) performance. Also, we implemented the proposed design with Xilinx ML507 FPGA board and our experiment showed 140MB/sec read/write speed in Windows XP 32-bit and a SATA II HDD. This performance is almost equivalent with the speed of the direct SATA connection without FDE devices, hence our proposed processor is very suitable for SATA HDD Full Disk Encryption environments.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.5
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• pp.943-950
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• 2005

Recently, many of researches on stream transmission for satisfying each of different real-time transmission condition of the multimedia data that demands various service quality through high-speed networks have been studied actively. In this paper, we design a scheme that discriminately reserves the network resources for the transmission of each multimedia application and propose a bandwidth allocation scheme for improving the utilization ratio of free resources. And we also propose a pipelining scheme for providing flexible real-time transmission. The proposed schemes can be used to support a real-time transmission by applying feedback transmission control method based on receiving buffer for guaranteeing the synchronization conditions requested by the multimedia data. Moreover, we propose a transmission control scheme that can take the amount of network resources down to the minimum amount within the range of permissible error-range under the guarantee with no quality degradation simultaneously when the bottleneck is caused by the network congestion. Finally, we propose a dynamic bandwidth smoothing scheme that can smooth the maximum bandwidth to the demand of each video steam for giving continuous transmission to the delay sensitive video steam between senders and receivers.

• Journal of Convergence for Information Technology
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• v.8 no.6
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• pp.209-215
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• 2018

In this paper, we propose a method to detect and block Meltdown malicious code which is increasing rapidly using dynamic sandbox tool. Although some patches are available for the vulnerability of Meltdown attack, patches are not applied intentionally due to the performance degradation of the system. Therefore, we propose a method to overcome the limitation of existing signature detection method by using machine learning method for infrastructures without active patches. First, to understand the principle of meltdown, we analyze operating system driving methods such as virtual memory, memory privilege check, pipelining and guessing execution, and CPU cache. And then, we extracted data by using Linux strace tool for detecting Meltdown malware. Finally, we implemented a decision tree based dynamic detection mechanism to identify the meltdown malicious code efficiently.