• Title/Summary/Keyword: 트렐리스부호

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Performance Analysis of MAP Algorithm and Concatenated Codes Using Trellis of Block Codes (블록부호의 트렐리스를 이용한 MAP 알고리즘 및 연접부호의 성능분석)

  • 백동철;양경철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.6A
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    • pp.905-912
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    • 1999
  • In this paper we explain a trellis representation of block codes and derive their MAP decoding algorithm based on it. We also analyze the performance of block codes and concatenated codes with block codes as components by computer simulations, which were performed by changing the structures and constituent codes of concatenated codes. Computer simulations show that soft decision decoding of block codes get an extra coding gain than their hard decision decoding and that concatenated codes using block codes have good performance in the case of high code rate.

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Serially Concatenated Space-Time Code using Iterative Decoding of High Data Rate Wireless Communication (고속 무선 통신을 위한 반복 복호 직렬 연쇄 시.공간 부호)

  • 김웅곤;구본진;양하영;강창언;홍대식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4A
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    • pp.519-527
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    • 2000
  • This paper suggests and analyzes the Serially Concatenated Space-Time Code(SCSTC) with the possibility of a efficient high-speed transmission in a band limited channel. The suggested code has a structure that uses the interleaver to connect the space-time code as an inner code and the convolutional code as a outer code serially. This code keeps the advantage of high-speed transmission and also has the high BER performance. The performance of the suggested system is compared with the conventional bandwidth efficient trellis coded modulation, such as a Serially Concatenated Trellis Coded Modulation (SCTCM) and a Turbo-Trellis Coded Modulation(Turbo-TCM). The results show that the suggested system has a 2.8dB and 3dB better BER performance than SCTCM and Turbo-TCM respectively in case of the transmission rate 2b/s/Hz in fading channel.

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Block Turbo Codes Using Efficient Reduced Search Trellis Decoding Method (효율적인 복잡도 감소 기법을 적용한 블록 터보 부호)

  • 김수영;이수인
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.7B
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    • pp.1301-1312
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    • 2000
  • 본 논문에서는 트렐리스 복호 방식을 이용한 블록 터보 부호의 이로적인 성능 바운드와 함께 내부 구성 부호의 변형 및 내부 구성 부호의 연결 방법에 따른 성능의 변화를 살펴본다. 또한 효율적인 복잡도 감소 기법을 적용한 반복 복호 기법을 소개하고 시뮬레이션을 통하여 성능을 분석한 결과를 제시한다. 가우시안 채널에서의 시뮬레이션 결과에 따르면 본 논문에서 제시한 기법은 약 1/10정도의 복잡도를 가지고서도 전체 트렐리스를 탐색한 기법에 거의 근접하는 성능을 얻을 수 있음이 보여졌다.

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Trellis Encoding of 6/8 Balanced Code for Holographic Data Storage Systems (홀로그래픽 저장장치를 위한 2차원 6/8 균형부호의 트렐리스 인코딩)

  • Kim, Byungsun;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.10
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    • pp.569-573
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    • 2014
  • Holographic data storage is a strong contender to become the next-generation data storage method. Its major weaknesses are two-dimensional intersymbol interference between neighboring pixels and interpage interference caused by storing multiple pages in a single volume of hologram. In this paper, we present a trellis encoding scheme of 6/8 balanced modulation code, to address the two weaknesses. The proposed modulation coding scheme captures on characteristics of the balanced code: the scheme relaxes IPI and enables error correction by exploiting the trellis structure. The proposed method showed improved SNR over the conventional 6/8 modulation code.

A Study on Evaluation of MTCM with Optimum Encoder (최적부호기의 MTCM 성능 이득에 관한 연구)

  • 김민호;박재운;변건식
    • Journal of the Korea Society of Computer and Information
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    • v.4 no.4
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    • pp.185-192
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    • 1999
  • In this paper. for $\pi$/4 and $\pi$/8 PSK. we proposed to condition to obtain coding gain increasing states, by design encoder of analytical method with minimal complexity in limited bandwidth and power channels. In order to improve the bit error rate(BER), comparing Ungerboeck designed the TCM. we propose MTCM(Multiple trellis-coded modulation) with multiplicity(k=2), by optimum encoder design. By design encoder of analytical method. the trellis encoder can be minimal complexity and the decoder be used Viterbi decoder(MLSE). When compared to the TCM and MTCM with AWGN channels. the condition of performance enhancement of the MTCM with multiplicity(k=2) is the case of parallel transition in TCM systems. without alternating data transmission rate in bandwidth and power limited channels.

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4-Level 4/6 Modulation Code with Trellis Encoding on Holographic Data Storage (홀로그래픽 데이터 저장장치에서 트렐리스 인코딩을 이용한 4-레벨 4/6 변조부호)

  • Jeong, Seongkwon;Lee, Jaejin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.6
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    • pp.11-16
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    • 2017
  • Multi-level holographic data storage requires modulation codes for avoiding two dimensional inter-symbol interference (2D-ISI). Modulation codes can remove the fatal ISI pattern of neighboring the largest and the smallest symbols. In this paper, we propose a 4-level 4/6 modulation code and its trellis encoding for error correction. The proposed 4/6 modulation code prevents that the symbol 0 and 3 are not adjacent in any direction. Also, we compare the proposed modulation code with the same code rate modulation codes for four-level holographic data storage.

Radix-4 Trellis Parallel Architecture and Trace Back Viterbi Decoder with Backward State Transition Control (Radix-4 트렐리스 병렬구조 및 역방향 상태천이의 제어에 의한 역추적 비터비 디코더)

  • 정차근
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.397-409
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    • 2003
  • This paper describes an implementation of radix-4 trellis parallel architecture and backward state transition control trace back Viterbi decoder, and presents the application results to high speed wireless LAN. The radix-4 parallelized architecture Vietrbi decoder can not only improve the throughput with simple structure, but also have small processing delay time and overhead circuit compared to M-step trellis architecture one. Based on these features, this paper addresses a novel Viterbi decoder which is composed of branch metric computation, architecture of ACS and trace back decoding by sequential control of backward state transition for the implementation of radix-4 trellis parallelized structure. With the proposed architecture, the decoding of variable code rate due to puncturing the base code can easily be implemented by the unified Viterbi decoder. Moreover, any additional circuit and/or peripheral control logic are not required in the proposed decoder architecture. The trace back decoding scheme with backward state transition control can carry out the sequential decoding according to ACS cycle clock without additional circuit for survivor memory control. In order to evaluate the usefulness, the proposed method is applied to channel CODEC of the IEEE 802.11a high speed wireless LAN, and HDL coding simulation results are presented.