• Title/Summary/Keyword: 트랜시스 모듈

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Development of the TRNSYS Simulation Modules for System Air-Conditioner and Its' Verification (TRNSYS 시뮬레이션을 통한 시스템 에어컨의 구현과 타당성 검증)

  • Ki, Hyun-Seung;Hong, In-Pyo;Park, Jun-Won;Kang, Ki-Nam;Song, Doo-Sam
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.24 no.4
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    • pp.315-322
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    • 2012
  • In these days, importance of HVAC system in office building is steadily growing in terms of thermal comfort and energy savings. As a energy efficient heating and cooling system, system air-conditioner which can be controlled distinctly and has a high COP is more widely adopted nowadays. However, the features and advantages of system air-conditioner were not reported well because system air-conditioner did not describe yet by conventional simulation methods such as TRNSYS, e-Quest, Energyplus, etc. In this study, by using the TRNSYS program which is able to show module implementation and building energy consumption analysis, system air-conditioner module will be proposed and validated through comparison between the simulation results and measurement results.

Design of the Low-Power Continuous-Time Sigma-Delta Modulator for Wideband Applications (광대역 시스템을 위한 저전력 시그마-델타 변조기)

  • Kim, Kunmo;Park, Chang-Joon;Lee, Sanghun;Kim, Sangkil;Kim, Jusung
    • Journal of IKEEE
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    • v.21 no.4
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    • pp.331-337
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    • 2017
  • In this paper, we present the design of a 20MHz bandwidth 3rd-order continuous-time low-pass sigma-delta modulator with low-noise and low-power consumption. The bandwidth of the system is sufficient to accommodate LTE and other wireless network standards. The 3rd-order low-pass filter with feed-forward architecture achieves the low-power consumption as well as the low complexity. The system uses 3bit flash quantizer to provide fast data conversion. The current-steering DAC achieves low-power and improved sensitivity without additional circuitries. Cross-coupled transistors are adopted to reduce the current glitches. The proposed system achieves a peak SNDR of 65.9dB with 20MHz bandwidth and power consumption of 32.65mW. The in-band IM3 is simulated to be 69dBc with 600mVp-p two tone input tones. The circuit is designed in a 0.18-um CMOS technology and is driven by 500MHz sampling rate signal.