• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.7
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• pp.1261-1266
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• 2017

A random and systematic jitter suppressed delay locked loop (DLL)-based clock generator with a delay-time voltage variance converter (DVVC) and an averaging circuit (AC) is presented. The DVVC senses the delay variance of each delay stage and generates a voltage. The AC averages the output voltages of two consecutive DVVCs to suppress the systematic and random delay variance of each delay stage in the VCDL. The DVVC and AC averages the delay time of successive delay stages and equalizes the delay time of all delay stages. In addition, a capacitor with a switch working effectively as a negative feedback function is introduced to reduce the variation of the loop filter output voltage. Measurement results of the DLL-based clock generator fabricated in a one-poly six-metal $0.18{\mu}m$ CMOS process shows 13.4-ps rms jitter.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.184-190
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• 2006

Using COMS which provides multi-beam switching function, the optimal transmission channel environments which provides the high data rate communication are proposed in this paper. Also the link budget for communication transponder of COMSAT is designed. Bsaed on the channel modeling for group delay, non-linear and gain flatness characteristics, the system performances which provide high data rate (HDR) service were analyzed in Ka-band satellite channel. As the transmission data rate is increased, the degradation due to these channel characteristics is severely affect the system performance. To efficiently provide the various service via the same transmission system it is necessary to equlize the primary impairment factors. The optimum operating points of HDR satellite transmission system are implemeted and operated by considering the analyzed results on channel characteristics.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.7B
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• pp.1226-1235
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• 2000

신호망에서의 지연은 망관리 행위의 응답시간에 직접적인 영향을 미치기 때문에 모든 제어정보는 가장 효과적으로 전송되어야 한다. 신호망이 효율적으로 운용되는지 뿐만 아니라 신호망의효과적인 설계를 위해서 신호시스템의 성능을 아는 것이 매우 중요하다. 본 논문에서는 공통선 신호 시스템의 신호망 기능부의 지연 성능을 분석하였다. 분석은 ITU-T 규격을 기반으로 다른 계층의 프로토콜에 독립적인 큐잉모델을 만들어 대기체계분석을 통하여 이루어졌다. 또한 신호망 기능부가 신호 메시지 처리부와 신호망 관리부로 나누어져 구성되는 것도 고려하여 모델링하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1527-1532
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• 2003

기존의 GPC방법으로 제어하기 힘든 비선형성과 플랜트의 변수변화를 포함하는 비선형 플랜트를 지연 예측신경망을 사용하여 효과적으로 제어하는 적응 GPC방법을 제안한다 제안한 방법에서는 플랜트의 선형 변수 추정이나 근사적인 모델로부터 선형 매개변수를 구해서 선형 모델을 만들고 실제 시스템의 출력과 선형모델의 오차를 신경망의 출력으로 표현한 다음, 이 식으로부터 적응 GPC 알고리듬을 유도한다. 여기서 지연 예측신경망은 적응 GPC에 이용될 플랜트의 출력을 예측하도록 학습된다. 이와 같은 제어기를 구성함으로써 선형 변수만으로 적응 GPC 제어기가 구성되어질 경우 생기는 비선형 변수의 추정과 출력 예측 값을 계산하는 번거로움을 해결하였다.

• Journal of KIISE:Software and Applications
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• v.26 no.6
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• pp.780-790
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• 1999

데이터 웨어하우스는 의사결정을 위하여 여러 소스로부터 데이터를 계속 축적하는 저장고로 볼 수 있다. 따라서, 데이터웨어하우스와 지역소스사이의 일관성 유지문제는 데이터 웨어하우스 환경에서 가장 중요한 문제중의 하나로 인식되어 오고 있다. 본 논문에서는 실체 뷰를 기반으로 하는 데이터 웨어하우스 시스템에서 통신지연을 고려한 일관성 유지 알고리즘을 제안한다. 기존의 연구와 달리 제안한 알고리즘은 다중 갱신을 허용하면서도 완전 일관성을 수준을 보장한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.9C
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• pp.643-651
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• 2008

In this paper, we propose a method to determine the optimal cyclic delay value of cyclic delay diversity(CDD) in orthogonal frequency division multiplexing(OFDM) systems. As the cyclic delay value increases, we can get signal to interference and noise ratio(SINR) gain by diversity effect, while SINR loss increases because of channel estimation errors. If the optimal delay value obtained by the proposed method is applied to CDD scheme, we can minimize the required SINR for a given FER(frame error rate) under the above mentioned trade-off.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.1
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• pp.205-214
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• 2008

To transfer large amount of packets fast in sensor network, it is necessary that the delay between successive packet transmissions should be minimized as possible. In Sensor network, since the Operating Systems are worked on the event driven, the Timer Event is used to transfer packets successively. However, since the transferring time of packet completely is varies very much, it is very hard to set appropriate interval. If interval is too long, delay also becomes too long but if interval is too short, the fail of transfer request would increase. In this paper, we propose ESTEO which reduces the delay between successive packet transmissions by using SendDone Event which informs that a packet transmission has been completed. In ESTEO, the delay between successive packet transmissions is shortened very much since the transmission of next Packet starts at the time when the transmission of previous packet has completed, irrespective of the transmission time. Therefore ESTEO could provide high packet transmission rate given large amount of packets.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2022.06a
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• pp.129-130
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• 2022

선박 상태를 모니터링 함에 있어, 선내 내부망의 보안을 해치지 않는 상황에서 선내의 데이터를 획득하여 별도의 통신망으로 원격통신을 원활하게 하기 위한 데이터 습득 방법 연구하고, 데이터 지연시간을 분석한다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.1113-1116
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• 2005

Using COMSAT which provides multi-beam switching function, the optimal transmission channel environment which provides the high data rate communication are proposed in this paper. Also the link budget for communication transponder of COMSAT is designed. Based on the channel modeling for group delay, non-linear and gain flatness characteristics, the system performances which provide various data rate services were analyzed in Ka-band satellite channel. As the transmission data rate is increased, the degradation due to these channel characteristics is severely increased. The linear component of group delay and the AM-AM component of non-linear characteristics severely affect the system performance. To efficiently provide the various service via the same transmission system it is necessary to equalize the primary impairment factors. The optimum operating points of HDR satellite transmission system are implemented and operated by considering the analyzed results on channel characteristics.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.7
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• pp.1259-1265
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• 2006

In this paper, we propose a combined synthetic algorithm of the logic level for high speed FPGA design. The algorithm divides critical path to reduce delay time and generates a circuit which the divided circuits execute simultaneously. This kernel selection algorithm is made by C-langage of SUN UNIX. We compare this with the existing FlowMap algorithm. This proposed algorithm shows result on 33.3% reduction of delay time by comparison with the existing algorithm.