• Journal of KIISE:Software and Applications
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• v.32 no.3
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• pp.227-235
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• 2005

In the embedded system domain, both memory requirement and energy consumption are great concerns. To save memory and energy, the 32 bit ARM processor supports the 16 bit Thumb instruction set. For a given program, the Thumb code is typically smaller than the ARM code. However, the limitations of the Thumb instruction set can often lead to generation of poorer quality code. To generate codes with smaller size but a little slower execution speed, Krishnaswarmy suggests a profiling guided selection algorithm at module level for generating mixed ARM and Thumb codes for application programs. The resulting codes of the algorithm give significant code size reductions with a little loss in performance. When the instruction set is selected at module level, some functions, which should be compiled in Thumb mode to reduce code size, are compiled to ARM code. It means we have additional code size reduction chance. In this paper, we propose a profile guided selection algorithm at function level for generating mixed ARM and Thumb codes for application programs so that the resulting codes give additional code size reductions without loss in performance compared to the module level algorithm. We can reduce 2.7％ code size additionally with no performance penalty

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.338-341
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• 2011

프로그램 코드 사이즈는 내장형시스템 구성에 있어서 고려해야 할 핵심 요소중의 하나이다. 프로그램 사이즈는 해당 시스템의 메모리 크기, 전력소모, 성능, 가격 등에 영향을 미치기 때문이다. 프로그램 코드 사이즈를 최적화하기 위하여 활용할 수 있는 시스템 자원 중에서 효과적인 것 중 하나가 복수 로드/스토어 명령어(Multiple Load/Store Instruction, MLS)이다. MLS 명령어는 하나의 명령어로 하나이상의 메모리 값을 레지스터로 블록 전송 (block transfer)하는 것이 가능하기 때문이다. 본 연구에서는 MLS명령어를 기존보다 효과적으로 생성함으로써 코드 크기를 감소시키는 최적화 기법에 대해 논의한다. 실험을 통하여 Mediabench와 DSPStone 벤치마크에서 본 연구에서 제안하는 기법을 통하여 평균 메모리 접근 코드사이즈가 10.3% 감소하였다.

• Journal of IKEEE
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• v.17 no.3
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• pp.352-359
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• 2013

This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.

• Annual Conference of KIPS
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• 2017.11a
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• pp.257-258
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• 2017

머신러닝 기법을 다양한 분야에 사용되는 연구가 한창이다. 본 논문에서는 악성 코드의 분류 시스템에 머신러닝 기법을 적용하였다. 악성 코드 파일을 적당한 크기로 이미지화하여 텐서 플로우의 인셉션 V3에 적용하였다. 실험 결과, 이미지의 사이즈 조정과 파라미터 조정을 통해 매우 만족할 만한 수준으로 악성 코드를 잘 분류함을 확인할 수 있었다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.11
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• pp.1209-1216
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• 2009

This paper presents an efficient Quantized Equal Gain Transmission(QEGT) codebook index searching technique for MISO beamforming system in a Rayleigh flat fading channel. The searching time for the optimum weight vector among the codebook vectors increases exponentially when the codebook size increases linearly, although the bit error rate decreases. So, newly defined simple metric is proposed for fast searching, which determines a few candidates. Then the conventional method combined with accurate search algorithm selects the optimal index. This strategy significantly reduces the overall search time, while maintaining almost the same bit error rate performance. Furthermore, as the codebook size increases, the search time is considerably decreased compared to that of the conventional approach.

• Proceedings of the Korea Multimedia Society Conference
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• 2004.05a
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• pp.342-345
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• 2004

자바는 임베디드 시스템을 프로그램 하기에 매력적인 언어와 플랫폼으로 인식되어져 왔다. 그러나 잉베디드 자바의 메모리와 프로세서 한계점을 가지고 임베디드 자바에 표준 자바 클래스 파일을 적용하기에는 적당하지 않다. 본 논문에서는 타겟디바이스에서 바이트 코드를 수행하기 전에 심볼레퍼런스 정보를 실제 주소로 바꾸기 위해 프리레졸루션을 사용하여 실행시간을 줄일 수 있는 효율적인 메소드를 제안하였다. 클래스 파일에서 컨스턴트풀의 사이즈를 알기 위해서 13개의 클래스 파일들을 시험하였다. 본 프리레졸루션은 원래 사이즈의 92% 정도 전체적인 메모리 footprint를 줄였다. 또한, 메모리 참조 횟수도 감소시켰다.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.819-833
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• 2005

Code size reduction is ever becoming more important for compilers targeting embedded processors because these processors are often severely limited by storage constraints and thus the reduced code size can have a positively significant Impact on their performance. Various code size reduction techniques have different motivations and a variety of application contexts utilizing special hardware features of their target processors. In this work, we propose a novel technique that fully utilizes a set of hardware instructions, called the multiple load/store (MLS), that are specially featured for reducing code size by minimizing the number of memory operations in the code. To take advantage of this feature, many microprocessors support the MLS instructions, whereas no existing compilers fully exploit the potential benefit of these instructions but only use them for some limited cases. This is mainly because optimizing memory accesses with MLS instructions for general cases is an NP-hard problem that necessitates complex assignments of registers and memory off-sets for variables in a stack frame. Our technique uses a couple of heuristics to efficiently handle this problem in a polynomial time bound.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.83-90
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• 2004

In this paper, we proposed a new instruction set(X32Y ISA) with 3 different types of instruction mode. The proposed instruction set organizes 32-bit, 24-bit, 16-bit instruction in order to solves a problem of memory size limitation in an embedded microprocessor. We designed a 32-bit 5 stage pipeline RISC microprocessor based on the X32V ISA. To verify the proposed the X32V ISA and a microprocessor, we estimated a program code size of multimedia application programs using a X32V simulator. In result, we verified that the Light mode and the Ultra Light mode obtains 8%, 27% reduction of a program code size through comparison with the Default mode. The proposed microprocessor was verified all X32V instructions execution at Xilinx FPGA with 33MHz operating frequency,

• Journal of the Korean Society of Costume
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• v.60 no.1
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• pp.1-13
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• 2010

Recently population of figure skating is growing fast, so that the needs for girls figure skating wear of better quality and better fit is growing too. As the characteristics of figure skating require both strong stretching and grace movements, the skating wears should be designed to have sufficient extensibility and impressive effects through body movements. In order that the figure skating wear should be fit well by using right sizing systems. The purpose of this study is to find out how the figure skating wear specialists are using their sizing system. There were two separate comparative studies in this article. One is to compare girls' sizing system between countries such as USA, UK, Japan and Korea. This is to look into the characteristics of girls body measurements than adults or other ages. The other is to compare sizing systems of 88 figure skating wear specialists from 8 countries. As a results, it is suggested that there should be a practical sizing systems for figure skating wear, which uses common size code, measurements definition and size interval.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.9A
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• pp.1039-1047
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• 2004

In this paper, we propose a new channel estimation technique for long code DS-CDMA DMB down link system which estimate the channel response based on the signal space vector only, unlike the most conventional sub-space method relying on the orthogonal property of noise space vectors to the signal space vector. Because of this property of the proposed method, very optimum covariance matrix in its dimension can be used in subspace analysis channel estimation technique otherwise it is likely too large to be implemented practically.