• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.12
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• pp.1264-1271
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• 2009

In this paper, the chip slot antenna which is used for mobile devices and designed for multi-band is proposed. The proposed antenna is comprised of a chip antenna(10 mm$\times$20 mm$\times$1.27 mm) and a system circuit board(30 mm$\times$60 mm$\times$0.8 mm). The chip slot antenna is mounted on the system circuit board and the end of F-type strip line which is patterned on the chip antenna is connected by a via with a ground plane of the system circuit board. So, a chip antenna radiates effectively the energy by transition between a microstrip line of the system circuit board and a open slot structure of the chip antenna. In the results of proposed antenna, impedance bandwidth of 3:1 VSWR(-6 dB return loss) is 1.98 GHz(1.61~3.59 GHz) and 0.8 GHz(5.2~6 GHz). So, it can cover multi-band of DCS, PCS, UMTS, WLAN. The proposed antenna can be applied to mobile devices.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.12
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• pp.20-26
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• 1999

A CMOS 6-bit 100MSPS ADC for DBS receiver is designed. The proposed ADC is composed of folding block, latch block, and digital block. The cascode interpolating block and kickback reduced latch are proposed with a high speed architecture. To verify the performance of ADC, simulations are carried out by HSPICE. The ADC achieves a clock frequency of 100MHz with a power dissipation of 40mW for 3 V supply voltage. The active chip area is $1500{\mu}m{\times}1000{\mu}m$with $0.65{\mu}m$ 2-poly 2-metal CMOS process. Further, INL and DNL are within ${\pm}0.6LSB$, ${\pm}0.5LSB$, respectively. SNDR is about 33dB at 10MHz input frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6B
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• pp.456-468
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• 2008

In this paper, we design Input/Output modules as a preference work for implementation of hybrid two stage AWG based WDM-PON and verify operations of each function modules through the logic simulation. This WDM-PON system provides service to 128 ONUs through 32 wavelength and one wavelength is shared for upstream transmission with four ONU while each wavelength is allocated to each ONU for downstream transmission. The designed WDM-PON MAC chip is based on sub-MAC which consists of one control unit and reception unit and four transmission unit. To design the reception and transmission unit of sub-MAC, we define the functions of the sub-MAC, pins of the modules, control signal and timing of each signal. We intend to design MAC chip with 1Gbps transmission rate. Thus the designed MAC chip is worked on 125MHz clock rate. We define FSM and design Input/Output modules with VHDL. The logic simulation of the modules is executed by the ModelSIM simulator.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.3
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• pp.264-272
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• 2009

In this paper, a Ka-band 10 W power amplifier module is designed and fabricated using MIC(Microwave Integrated Circuit) module technology which combines multiple power MMIC(Monolithic Microwave Integrated Circuit) chips on a thin film substrate. Modified Wilkinson power dividers/combiners are used for millimeter wave modules and CBFGC-PW-Microstrip transitions are utilized for reducing connection loss and suppressing resonance in the high-gain and high-power modules. The power amplifier module consists of seven MMIC chips and operates in a pulsed mode. for the pulsed mode operation, a gate pulse control circuit supplying the control voltage pulses to MMIC chips is designed and applied. The fabricated power amplifier module shows a power gain of about 58 dB and a saturated output power of 39.6 dBm at a center frequency of the interested frequency band.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.310-310
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• 2012

최근 전자산업의 발달에 따른 전자제품의 소형화 및 고기능화 요구에 대응하기 위하여 저항(resistor), 커패시터(capacitor), IC (integrated circuit) 등의 수동소자를 개별 칩(discrete chip) 형태로 형성하여 기판의 표면에 실장하는 기술이 일반화되고 있다. 그러나, 수동 소자의 내장 기술은 기판의 패턴 밀도의 급격한 향상과 더불어 수동소자의 내장 공간도 협소해지는 문제점이 있다. 상기의 문제점을 해결하기 위해 개별 칩 형태의 내장형 저항체를 박막 형태의 내장 저항체를 구현하는 기술의 개발이 최근 주목을 받고 있다. 박막 저항체는 기존의 권선저항 및 후막저항과 비교하여 정밀한 온도저항계수를 가지며 이동통신에 적용시 고주파 영역(GHz)에서의 안정성과 주파수 특성이 좋다는 장점들을 가지고 있다. 박막 저항 물질로는 높은 경도와 우수한 열적 안정성을 가지고 있는 TaN (tantalum nitride)이 주로 사용되고 있다. 일반적으로, TaN 박막은 스퍼터링을 사용하며 제조되며 TaN 박막의 성질은 탄탈륨과 질소의 화학정량비, 박막의 결함 정도, 또는 공정압력 및 증착 온도, 플라즈마 파워 등과 같은 공정조건 등의 변화에 민감하게 변화하므로, TaN 박막의 다양한 연구가 더 필요한 실정이다. 본 연구에서는 반응성 마크네트론 스퍼터링을 사용하여 TaN 박막을 Si 기판 위에 증착하였고 TaN 박막의 원하는 특성을 제어할 수 있도록 질소 분압과 total gas volume을 조절하여 공정을 최적화하는 연구를 진행하였다. 또한 tensile pull-off 방법을 이용하여 TaN 박막의 부착강도를 평가하였고, 온도 사이클 및 고온고습 환경에 노출된 TaN 박막들의 열화 특성들에 대하여 연구하였다.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.23-23
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• 2003

PCB 회로기판용 전해동박은 드럼형태의 음극 표면에 연속적으로 전기 도금한 후 벗겨내어 권취하는 원박 제조공정과 접착성, 내열성, 내화학성, 방청성을 부여하기 위한 후처리 공정으로 나눈다. 이 후처리 공정 중 동박과 수지와의 접착성을 부여하기 위해 일반적으로 전기도금을 통해 조화(Nodule)처리를 실시하는데, 최근 LCD, PDP 등의 평판 디스플레이 장치의 구동칩이 실장되는 TCP용 동박의 경우 2$\mu\textrm{m}$이하의 낮은 조도(Rz)와 함께 높은 접착강도(Peel Strength)가 요구되고 있다. 그러나, Reel to Reel 형태의 연속도금공정으로 진행되는 조화처리에 있어 일반 비이커 실험결과는 실제 양산공정과의 재현성에 있어서 상당한 제한성이 노출된 바 있다. 이에 본 연구에서는 Reel to Reel 형태의 연속도금공정을 모사 할 수 있는 실험장치를 설계, 제작하여 동박표면의 노듈형성에 있어 주요인자를 정량적으로 분석하였다.

• Korean Journal of Plant Resources
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• v.16 no.3
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• pp.264-274
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• 2003

Many potato genetic resources have been collected and improved for their diverse traits over the years using breeding program in KPGR. To select potential varieties for table and processing in Korea, 58 elite potato breeding lines and several 'Valley' varieties were cultivated and harvested at Korea Alpine area in 2001. The cultivated lines and varieties were evaluated using their cultural adaptability in the environment and tuber characteristics, such as the depth of tuber eye, tuber shape, skin color, flesh color, scab resistance, yield, and the resistance of hollow heart and internal brown spot disease. Additionally, in the selection of potential processing varieties, reducing sugar content (sum of glucose and fructose concentration) of tubers is critically considered, because it mainly influence on the chip color of processing potato tuber. For table stock varieties with white skin color, 'Early Valley', 'Summer Valley', 'Winter Valley', and 'Taebok Valley' were selected. In the aspect of diverse potato tuber color, several varieties were selected such as 'Golden Valley' for its yellow fresh and skin color, 'Gogu Valley', 'Juice Valley', and 'Rose Valley' for their red skin color, and 'Purple Valley' for its purple skin. Compared with world wide known processing cultivar 'Atlantic', 24 lines (or varieties) were selected for the potential potato processing industry due to their low reducing sugar contents (below 0.3％), high yield (above 4.0 ton/ha), and unique chip colors. Selected white chipping varieties were 'Taedong Valley', 'Kangshim Valley', and 'Kangwon Valley', which have 0.23％, 0.27％, and 0.29％ of reducing sugar contents, respectively. 'Bora Valley', having deep purple color in both skin and fresh, was selected for purple chip variety and has 0.26％ of reducing sugar content. Light yellow chip varieties (lines) were 'Rose Valley' and Valley 54, having 0.19％ and 0.269％ of reducing sugar content, respectively. For French frying potatoes, 'Stick Valley' of 0.22％ and Valley 72 of 0.151％ in reducing sugars were selected. All of these selected lines and 'Valley' varieties can be used as parents to improve potato genetic resources and to develop better varieties with unique traits and colors.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.1
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• pp.1-10
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• 2018

Recently, there has been rapid development in the field of flexible electronic devices, such as organic light emitting diodes (OLEDs), organic solar cells and flexible sensors. Encapsulation process is added to protect the flexible electronic devices from exposure to oxygen and moisture in the air. Using numerical simulation, we investigated the effects of the encapsulation layer on mechanical stability of the silicon chip, especially the fracture performance of center crack in multi-layer package for various loading condition. The multi-layer package is categorized in two type - a wide chip model in which the chip has a large width and encapsulation layer covers only the chip, and a narrow chip model in which the chip covers both the substrate and the chip with smaller width than the substrate. In the wide chip model where the external load acts directly on the chip, the encapsulation layer with high stiffness enhanced the crack resistance of the film chip as the thickness of the encapsulation layer increased regardless of loading conditions. In contrast, the encapsulation layer with high stiffness reduced the crack resistance of the film chip in the narrow chip model for the case of external tensile strain loading. This is because the external load is transferred to the chip through the encapsulation layer and the small load acts on the chip for the weak encapsulation layer in the narrow chip model. When the bending moment acts on the narrow model, thin encapsulation layer and thick encapsulation layer show the opposite results since the neutral axis is moving toward the chip with a crack and load acting on chip decreases consequently as the thickness of encapsulation layer increases. The present study is expected to provide practical design guidance to enhance the durability and fracture performance of the silicon chip in the multilayer package with encapsulation layer.

• KSBB Journal
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• v.24 no.1
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• pp.1-8
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• 2009

In the past decade, we have observed rapid advances in the development of biochips in many fields including medical and environmental monitoring. Biochip experiments involve immobilizing a ligand on a solid substrate surface, and monitoring its interaction with an analyte in a sample solution. Metal nanoparticles can display extinction bands on their surfaces. These charge density oscillations are simply known as the localized surface plasmon resonance (LSPR). The high sensitivity of LSPR has been utilized to design biochips for the label-free detection of biomolecular interactions with various ligands. LSPR-based optical biochips and biosensors are easy to fabricate, and the apparatus cost for the evaluation of optical characteristics is lower than that for the conventional surface plasmon resonance apparatus. Furthermore, the operation procedure has become more convenient as it does not require labeling procedure. In this paper, we review the recent advances in LSPR research and also describe the LSPR-based optical biosensor constructed with a core-shell dielectric nanoparticle biochip for its application to label-free biomolecular detections such as antigen-antibody interaction.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.971-978
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• 2010

In this paper, we propose a compact multiple meander RFID tag antenna with broadband characteristic. The proposed tag antenna has been designed using the multiple meander form to effectively minimize the U-shaped half wavelength dipole antenna as the radiator part. The commercial tag chip is attached to the upper center of the rectangular shaped feed for impedance matching. The size of the antenna is $20{\times}19.7\;mm^2$ and VSWR<5.8 bandwidth is 855~964 MHz which covers the world UHF RFID bandwidth.