• Title/Summary/Keyword: 칩 형태

Search Result 311, Processing Time 0.032 seconds

Underfill Flow Characteristics for Flip-Chip Packaging (플립칩 패키징 언더필 유동특성에 관한 연구)

  • Song, Yong;Lee, Sun-Beung;Jeon, Sung-Ho;Yim, Byung-Seung;Chung, Hyun-Seok;Kim, Jong-Min
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.16 no.3
    • /
    • pp.39-43
    • /
    • 2009
  • In this paper, the flow characteristics of underfill material driven by capillary action between flip-chip and substrate were investigated. Also, the effects of viscosity level and dispensing point of underfill on flow characteristics were investigated. Flip chip package size was $5mm{\times}5mm{\times}0.65^tmm$, the diameter of solder bump was 100 ${\mu}m$, and the pitch was 150 ${\mu}m$. It was full grid area-array type with 1024 I/Os. The glass substrate was used and the gap between the chip and substrate was 50 ${\mu}m$. For the experimental study, three different underfills with different viscous properties($2000{\sim}3700$ cps), and two different types of dispensing methods(center dot and edge dot) were used. The flow characteristics and filling time of underfill were investigated by using CCD camera. The results show that the edge flow was faster than center flow due to the edge effect, which was caused by the resistance of solder bumps. In case of edge dot dispensing type, the filling time was faster due to the large edge effect, compared to center dot dispensing type. Also, it was found that the underfill flow was faster and the filling time decreased as the viscosity level of underfill was decreased.

  • PDF

Development of Convergence Core Technology for Cancer Prognosis from Circulating Tumor Cells (혈중 암세포 기반 암 예후 예측 진단 융합기술 개발)

  • Jung, M.Y.;Lee, D.S.;Park, J.W.;Shin, Y.K.;Kim, Y.D.
    • Electronics and Telecommunications Trends
    • /
    • v.29 no.5
    • /
    • pp.105-113
    • /
    • 2014
  • 주치의에게는 암환자의 암 전이 여부가 초미의 관심사다. 암환자의 10명 중 9명이 전이암으로 사망하기 때문이다. 암의 전이 초기에 그 전이 여부를 방사선 진단법으로 가능하지 않다. 혈액을 채취하여 암의 전이 유무를 진단 하는 기술이 개발되고 있다. 이 혈중 암세포는 혈구세포 10억개당 1~100개 정도의 극히 미량이 존재하여 암세포 분리기술이 특별히 잘 개발되어야 한다. 최근 마이크로바이오칩 형태의 분리기술이 큰 기술적 진화를 보이고 있어 본고에 소개하고자 한다. 이 기술은 한 가지 큰 의미를 갖는다. 그것은 암환자의 암 전이 모니터링에 필요한 도구가 될 수 있기 때문이다. 전이암세포 검출 키트로 전이암세포를 계수 하여 환자에게 투약한 항암제가 적합한지에 대한 답을 의사는 얻을 수 있다. 전이암세포 진단용 마이크로바이오칩 기술이 기존의 영상진단법만큼 중요한 임상 수단이 될 것으로 전망된다.

  • PDF

Analysis of Singular Stresses at the Bonding Interface of Semiconductor Chip Subjected to Shear Loading (전단하중하의 반도체 칩 접착계면의 특이응력 해석)

  • 이상순
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.7 no.4
    • /
    • pp.31-35
    • /
    • 2000
  • The stress state developed in a thin adhesive layer bonded between the semiconductor chip and the leadframe and subjected to a shear loading is investigated. The boundary element method (BEM) is employed to investigate the behavior of interface stresses. Within the context of a linear elastic theory, a stress singularity of type $\gamma^{\lambda=1}$(0<1<1) exists at the point where the interface between one of the rigid adherends and the adhesive layer intersects the free surface. Such singularity might lead to edge crack or delamination.

  • PDF

A Study on the Chip Treatment of Ti-6Al-4V Alloy in Turning processing (Ti-6Al-4V 합금의 선삭가공시 칩처리성에 관한 연구)

  • Park J.N.;Lee S.C.;Cho G.J.
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2005.06a
    • /
    • pp.1551-1554
    • /
    • 2005
  • The Titanium has many superior characteristics Which are specific strength, heat resistance, corrosion resistance, organism compatibility, non-magnetic and etc. and their quantity are abundant. this study performed turning operation of Ti-6Al-4V alloy using the TiAlN Coate Tool which treated PVD (Physical Vapor Deposition). Experimental works are also executed to measure cutting force, chip figuration and surface roughness for different cutting conditions. As a result of study. Tool wear was serious at over 100m/min of cutting speed and cutting condition was excellent at 1.0mm of cutting depth.

  • PDF

A Study on the Finite Element Analysis of Chip Formation in Machining (절삭가공시 집형성의 유한요소 해석에 관한 연구)

  • 김남용;박종권;이동주
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 1997.10a
    • /
    • pp.973-976
    • /
    • 1997
  • Process behavior in metal cutting results from the chip formation process which is not easily observable and measurable during machining. By means of the finite element method chip formation in orthogonal metal cutting is modeled. The reciprocal interaction between mechanical and thermal loads is taken into consideration by involving the thermo-viscoplastic flow behavior of workpiece material. Local and temporal distributions of stress and temperature in the cutting zone are calculated depending on the cutting parameters. The calculated cutting forces and temperatures are compared with the experimental results obtarned from orthogonal cutting of steel AISl 4140. The model can be applied in process design for selection of appropriate tool-workpiece combination and optimum cutting conditions in term of mechanical and thermal loads.

  • PDF

Thermal analysis of the Lamination Head for Die Bonding (다이 본딩 lamination head 열해석)

  • Hwang, Soon-Ho;Lee, Young-Lim
    • Proceedings of the KAIS Fall Conference
    • /
    • 2010.05b
    • /
    • pp.981-984
    • /
    • 2010
  • 생산성 증가 및 비용 절감을 위해 반도체 공정 기술을 단순화 시키는 것이 필요하다. WBL(Wafer Backside Lamination) 기술을 이용해 필름(film) 형태로 얇은 다이접착제를 웨이퍼(wafer)에 접착하여 반도체 칩과 PCB를 붙이는 방법과 직접 PCB에 다이접착제를 붙이는 방법을 사용하면 획기적으로 공정을 단순화 시킬 수 있다. 하지만 Lamination 기법은 고온을 이용하여 모듈화된 PCB에 접착하므로 전도와 복사에 의해 주변 접착제 필름이 녹아 버리는 문제점이 발생한다. 본 연구에서는 고온으로 인한 필름 융해 현상을 방지하기 위하여 배크라이트를 설치하였으며 CFD 해석을 통해 PCB와 반도체 칩을 접착시킬 때 열이 PCB에 미치는 영향을 살펴보았다.

  • PDF

Analysis of Low Internal Bus Operation Frequency on the System Performance in Embedded Processor Based High-Performance Systems (내장 프로세서 기반 고성능 시스템에서의 내부 버스 병목에 의한 시스템 성능 영향 분석)

  • Lim, Hong-Yeol;Park, Gi-Ho
    • Proceedings of the Korean Information Science Society Conference
    • /
    • 2011.06d
    • /
    • pp.24-27
    • /
    • 2011
  • 최근 스마트 폰 등 모바일 기기의 폭발적인 성장에 의해 내장 프로세서인 ARM 프로세서 기반 기기들이 활발히 개발되어 사용되고 있다. 이에 따라 상대적으로 저성능, 저 전력화에 치중하였던 내장 프로세서도 고성능화를 위한 고속 동작 및 멀티코어 프로세서를 개발하여 사용하게 되었으며, 메모리 동작 속도 역시 빠르게 발전하고 있다. 특히 모바일 기기 등에 사용 되는 저전력 메모리인 LPDDR2 소자 등의 개발에 따라 빠른 동작 속도를 가지도록 개발되고 있다. 그러나 시스템 온 칩(SoC, System on Chip) 형태로 제작되는 ARM 프로세서 기반의 SoC는 다양한 하드웨어 가속기 등을 함께 내장하고 있고, 저 전력화를 위한 버스 구조 등에 의하여 온 칩 버스의 속도 향상이 고성능 범용 시스템에 비하여 낮은 수준이다. 본 연구에서는 이러한 점을 고려하여, 프로세서 코어와 메모리 소자의 동작 속도 향상에 의하여 얻을 수 있는 성능 향상과, 상대적으로 낮은 버스 동작 속도에 의하여 저하되는 성능의 정도를 분석하고 이를 극복하기 위한 방안을 검토하였다.

Research of Nd:LSB microchip laser (Nd:LSB 마이크로 칩 레이저 연구)

  • 장원권;김태훈;유영문
    • Korean Journal of Optics and Photonics
    • /
    • v.13 no.6
    • /
    • pp.554-558
    • /
    • 2002
  • A new laser material, Nd:LSB $(Nd${3}:LaSc_3(BO_3)_4$, lanthanum scandium borate), of microchip type was grown by the Czochralski pulling method, and tested for optical and lasing properties. Nd:LSB, able to be highly doped with $Nd^{3+}$ ions while maintaining good optical, chemical, mechanical properties, was compared to another Nd-type laser material. The absorption and fluorescence spectra, and fluorescence lifetime were measured, and the crystal structure was analyzed. The lasing characteristics were investigated by using Ti:sapphire laser as a pumping light source.

Design of a Single Chip CMOS Transceiver for the Fiber Optic Modules (광통신 모듈용 단일칩 CMOS 트랜시버의 설계)

  • 채상훈;김태련;권광호
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.41 no.2
    • /
    • pp.1-8
    • /
    • 2004
  • This paper describes the design of monolithic optical transceiver circuitry being used as a part of the fiber optic modules. It has been designed in 0.6 ${\mu}{\textrm}{m}$ 2-poly 3 metal silicon CMOS analog technology and operates at 155.52 Mbps(STM-1) data rates. It drives laser diode to transmit intensity modulated optical signal according to 155.52 Mbps electrical data from system. Also, it receives 155.52 Mbps optical data that transmitted from other systems and converts it to electrical data using photo diode and amplifier. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. The die area is 4 ${\times}$ 4 $\textrm{mm}^2$ and the estimated power dissipation is less than 900 ㎽ with a single 5 V supply.

Development of Microscale RF Chip Inductors for Wireless Communication Systems (무선통신시스템을 위한 극소형 RF 칩 인덕터의 개발)

  • 윤의중;김재욱;정영창;홍철호
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.40 no.10
    • /
    • pp.17-23
    • /
    • 2003
  • In this study, microscale, high-performance, solenoid-type RF chip inductors were investigated. The size of the RF chip inductors fabricated in this work was 1.0${\times}$0.5${\times}$0.5㎣. The materials (96% Al2O3) and shape (I-type) of the core were determined by a Maxwell three-dimensional field simulator to maximize the performance of the inductors. The copper (Cu) wire with 40${\mu}{\textrm}{m}$ diameter was used as the coils. High frequency characteristics of the inductance (L), quality-factor (Q), and capacitance (C) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The inductors developed have inductances of 11 to 39 nH and quality factors of 28 to 50 over the frequency ranges of 250MHz to 1 GHz, and show results comparable to those measured for the inductors prepared by CoilCraf $t^{Tm}$ that is one of the best chip inductor company in the world. The simulated data predicted the high-frequency data of the L, Q, and C of the inductors developed well.l.