• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.91-96
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• 2011

In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

• Journal of IKEEE
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• v.24 no.1
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• pp.161-169
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• 2020

In order to reduce the manufacturing cost of MCU chips used in applications such as wireless chargers and USB-C, compared to DP-EEPROM (Double Poly EEPROM), which requires 3 to 5 additional process masks, it is even more necessary MTP(Multi-Time Programmable), which is less than one additional mask and have smaller unit cell size. In addition, in order to improve endurance characteristics and data retention characteristics of the MTP memory cell due to E/P(Erase / Program) cycling, the distribution of the V_TP(Program Threshold Voltage) and the V_TE(Erase Threshold Voltage) needs to be narrow. In this paper, we proposed a current-type BL S/A(Bit-Line Sense Amplifier) circuit, WM(Write Mask) circuit, BLD(BL Driver) circuit and a algorithm, which can reduce the distribution of program and V_T and erase V_T, through compare the target current by performing the erase and program pulse of the short pulse several times, and if the current specification is satisfied, the program or erase operation is no longer performed. It was confirmed that the 256Kb MTP memory fabricated in the Magnachip semiconductor 0.13㎛ process operates well on the wafer in accordance with the operation mode.

• Korean Chemical Engineering Research
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• v.51 no.4
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• pp.506-512
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• 2013

Biomass and low-grade coals are known to be better potential sources of energy compared to crude oil and natural gas since these materials are readily available and found to have large reserves, respectively. Gasification of these carbonaceous materials produced syngas for chemical synthesis and power generation. Woodchip, sawdust and lignite were gasified with steam in a thermobalance reactor under atmospheric pressure in order to evaluate their kinetic rate information. The effects of gasification temperature ($600{\sim}900^{\circ}C$) and partial pressure of steam (20~90 kPa) on the gasification rate were investigated. The three different types of gas-solid reaction models were applied to the experimental data to predict the behavior of the gasification reactions. The modified volumetric model predicted the conversion data well, thus the model was used to evaluate kinetic parameters in this study. The observed activation energy of biomass, sawdust and lignite gasification reactions were found to be in reasonable range and their rank was found to be sawdust > woodchip > lignite. The expression of apparent reaction rates for steam gasification of the three solids was proposed to provide basic information on the design of coal gasification processes.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7A
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• pp.683-694
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• 2002

In this paper, a digital image compression codec using 2D DWT(Discrete Wavelet Transform) is designed using the FPGA technology for real time operation The implemented image compression codec using wavelet decomposition consists of a wavelet kernel part for wavelet filtering process, a quantizer/huffman coder for quantization and huffman encoding of wavelet coefficients, a memory controller for interface with external memories, a input interface to process image pixels from A/D converter, a output interface for reconstructing huffman codes, which has irregular bit size, into 32-bit data having regular size data, a memory-kernel buffer to arrage data for real time process, a PCI interface part, and some modules for setting timing between each modules. Since the memory mapping method which converts read process of column-direction into read process of the row-direction is used, the read process in the vertical-direction wavelet decomposition is very efficiently processed. Global operation of wavelet codec is synchronized with the field signal of A/D converter. The global hardware process pipeline operation as the unit of field and each field and each field operation is classified as decomposition levels of wavelet transform. The implemented hardware used FPGA hardware resource of 11119(45%) LAB and 28352(9％) ESB in FPGA device of APEX20KC EP20k600CB652-7 and mapped into one FPGA without additional external logic. Also it can process 33 frames(66 fields) per second, so real-time image compression is possible.

• Journal of rehabilitation welfare engineering & assistive technology
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• v.7 no.1
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• pp.51-58
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• 2013

As it is changing into aging society, rehabilitation, welfare and sports industry markets are being expanded fast. Especially, the field of vital signals interface to control welfare instruments like wheelchair, rehabilitation ones like an artificial arm and leg and general electronic ones is a new technology field in the future. Also, this technology can help not only the handicapped, the old and the weak and the rehabilitation patients but also the general public in various application field. The commercial bio-signal measurement instruments and interface systems are complicated, expensive and large-scaled. So, there are a lot of limitations for using in real life with ease. this thesis proposes a wireless transmission interface system that uses EMG(electromyogram) signals and a control module to manipulate hardware systems with portable size. We have designed a hardware module that receives the EMG signals occurring at the time of wrist movement and eliminated noises with filter and amplified the signals effectively. DSP(Digital Signal Processor) chip of TMS320F2808 which was supplied from TI company was used for converting into digital signals from measured EMG signals and digital filtering. We also have used PCA(Principal Component Analysis) technique and classified into four motions which have right, left, up and down direction. This data was transmitted by wireless module in order to display at PC monitor. As a result, the developed system obtains recognition success ratio above 85% for four different motions. If the recognition ratio will be increased with more experiments. this implemented system using EMG wrist direction signals could be used to control various hardware systems.

• Journal of Biomedical Engineering Research
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• v.19 no.5
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• pp.477-486
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• 1998

In this paper, we implemented the urine analysis system capable of measuring a qualitative and semi-quantitative and assay using strip. The analysis algorithm of urine analysis was adopted a fuzzy logic-based classifiers that was robust to external error factors such as temperature and electric power noises. The spectroscopic properties of 9 pads In a strip were studied to developing the urine analysis system was designed for robustnesss and stability. The urine analysis system was consisted of hardware and software. The hardware of the urine analysis system was based on one-chip microprocessor, and Its peripherals which composed of optic modulo, tray control, preamplifier, communication with PC, thermal printer and operating status indicator. The software of the urine analysis system was composed of system program and classification program. The system program did duty fort system control, data acquisition and data analysis. The classification program was composed of fuzzy inference engine and membership function generator. The membership function generator made triangular membership functions by statical method for quality control. Resulted data was transferred through serial cable to PC. The transferred data was arranged and saved be data acquisition program coded by C+ + language. The precision of urine analysis system and the stability of fuzzy classifier were evaluated by testing the standard urine samples. Experimental results showed a good stability states and a exact classification.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.7
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• pp.2549-2558
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• 2010

A Remote Vital Sign Monitor is an in-home healthcare system designed to wirelessly monitor core-body temperature. The Remote Vital Sign Monitor provides accuracy and features which are comparable to hospital equipment while minimizing cost with ease-of-use. It has two parts, a bandage and a monitor. The bandage and the monitor both use the Chipcon2430(CC2430) which contains an integrated 2.4GHz Direct Sequence Spread Spectrum radio. The CC2430 allows Remote Vital Sign Monitor to operate at over a 100-foot indoor radius. A simple user interface allows the user to set an upper temperature and a lower temperature that is monitored with respect to the core-body temperature. If the core-body temperature exceeds the one of two defined temperatures, the alarm will sound. The alarm is powered by a low-voltage audio amplifier circuit which is connected to a speaker. In order to accurately calculate the core-body temperature, the Remote Vital Sign Monitor must utilize an accurate temperature sensing device. The thermistor selected from GE Sensing satisfies the need for a sensitive and accurate temperature reading. The LCD monitor has a screen size that measures 64.5mm long by 16.4mm wide and also contains back light, and this should allow the user to clearly view the monitor from at least 3 feet away in both light and dark situations.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.4
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• pp.160-167
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• 2005

Among finite filed arithmetic operations, division/inverse is known as a basic operation for public-key cryptosystems over $GF(2^{m})$ and it is computed by performing the repetitive $AB^{2}$ multiplication. This paper presents a digit-serial-in-serial-out systolic architecture for performing the $AB^2$ operation in GF$(2^{m})$. To obtain L×L digit-serial-in-serial-out architecture, new $AB^{2}$ algorithm is proposed and partitioning, index transformation and merging the cell of the architecture, which is derived from the algorithm, are proposed. Based on the area-time product, when the digit-size of digit-serial architecture, L, is selected to be less than about m, the proposed digit-serial architecture is efficient than bit-parallel architecture, and L is selected to be less than about $(1/5)log_{2}(m+1)$, the proposed is efficient than bit-serial. In addition, the area-time product complexity of pipelined digit-serial $AB^{2}$ systolic architecture is approximately $10.9\%$ lower than that of nonpipelined one, when it is assumed that m=160 and L=8. Additionally, since the proposed architecture can be utilized for the basic architecture of crypto-processor and it is well suited to VLSI implementation because of its simplicity, regularity and pipelinability.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12B
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• pp.1452-1458
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• 2009

In this paper, Our proposed Multipurpose Complex Card UHF band RFID small-size Tag antenna. Multi purpose Complex Card UHF band RFID small-size Tag antenna that is to minimize the low efficiency of RFID Tag Read Range that generates space limitation and a conductor surrounded by inducing fingerpring system with dual(HF, UHF) Card is presented. Our proposed UHF band RFID small-size Tag antenna is for the Multipurpose Complex Card that is mounted on the fingerpring system as well as the HF Tag. It also enables to minimize and facilitates Tag chip matching by adjusting Tapered, Meander line and Loop structure. Given the card substance properties and periphery circuit, the proposed small-size Tag antenna, in this report, is designed with PET film with size of $50{\times}15mm^2$. The RFID small-size Tag method for measurements is used by EPCglobal Static Test instrument in Anechoic Chamber, which is tested with dual Card, within the car and in wallet. It is found that Read Range is 3.8m from the EPCglobal Static Test, Maximum Read Range within the car from the field test results in 7.6m. Proposed Tag antenna is will be used in the parking control security system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.3
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• pp.517-526
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• 2008

A one-chip DC-DC converter circuit for OLED(Organic Light-Emitting Diode) display module of automotive clusters is newly proposed. OLED panel driving voltage circuit, which is a charge-pump type, has improved characteristics in miniaturization, low cost and EMI(Electro-Magnetic Interference) compared with DC-DC converter of PWM(Pulse Width Modulator) type. By using bulk-potential biasing circuit, charge loss due to parasitic PNP BJT formed in charge pumping, is prevented. In addition, the current dissipation in start-up circuit of band-gap reference voltage generator is reduced by 42% and the layout area of ring oscillator is reduced by using a logic voltage VLP in ring oscillator circuit using VDD supply voltage. The driving current of VDD, OLED driving voltage, is over 40mA, which is required in OLED panels. The test chip is being manufactured using $0.25{\mu}m$ high-voltage process and the layout area is $477{\mu}m{\times}653{\mu}m$.