• Title/Summary/Keyword: 출력 피드백

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A Simulation of Δ-Σ Modulators for Frequency Synthesizers of FMCW Radars (FMCW 레이더 주파수합성기용 델타-시그마 변조기의 시뮬레이션)

  • Hwang, In-Duk;Kim, Chang-Hwan
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.4
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    • pp.707-714
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    • 2012
  • After a single-stage, second-order, multiple-feedback ${\Delta}-{\Sigma}$ modulator and a two-stage, second-order MASH ${\Delta}-{\Sigma}$ modulator were analyzed and simulated using Simulink and Matlab and their characteristics were compared, the following result was obtained: 1) The two ${\Delta}-{\Sigma}$ modulators do not have group delay distortion. 2) The characteristics of the noise shaping are nearly identical. As a result of the noise shaping, the power spectral densities have slope of 40 dB/dec. 3) There was no spurious tone. 4) The input range of the two modulators is from -1 to +1 in common. 5) Because the output of the two-stage MASH modulator is 2-bits (4-levels), design of frequency dividers and charge pumps of PLL are more demanding.

Detection of Laser Generated Ultrasonic Wave Using Michelson Interferometer (마이켈슨 간섭계를 이용한 레이저 여기 초음파의 검출)

  • Kim, Kyung-Cho;Yamawaki, Hisashi;Jhang, Kyung-Young
    • Journal of the Korean Society for Nondestructive Testing
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    • v.20 no.1
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    • pp.27-32
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    • 2000
  • In this paper, ultrasonic wave in the thermoelastic regime was generated in a steel disk by illuminating a pulse laser (Q-switched Nd:YAG) on the surface of the sample and was detected on the other side by Michelson interferometer which was stabilized by feed back control. The experimentally detected displacement waveform of the ultrasonic wave showed good agreement with the theoretically expected one. Also it was shown that sound speeds of longitudinal and shear wave were similar to ones measured by pulse-echo method using a contact transducer. As an application of the noncontact ultrasonic measurement by using laser based ultrasonics, the sound speed in the sample was monitored while the sample was heated in a furnace, and the result showed that it decreased according to the increase of sample temperature.

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A Study on Stable Operation of Boost DC-DC Converter Circuit with 3-pole 2-zero Compensation Circuit (3-극점 2-영점 보상 회로가 적용된 승압형 DC-DC 컨버터 회로의 안정적 동작에 관한 연구)

  • Choi, Gun-Woo;Jung, Hai-Young;Lee, Seok-Hyun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.5
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    • pp.923-930
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    • 2020
  • In modern society, various DC power supplies are required to operate the system circuits of various electric devices. A stable DC supply is essential for the normal operation of the circuit and the importance of the converter for this is very high. This study proposed a PWM DC-DC converter circuit that applied a 3-pole 2-zero voltage controller to a KY converter, a step-up DC-DC converter, to maintain a stable supply of output voltage regardless of load fluctuations. In order to prove the normal operation characteristics of the proposed converter circuit, a PSIM simulation and a circuit operation experiment on the PCB board were performed in comparison with the conventional converter circuit.

A design of Space Compactor for low overhead in Built-In Self-Test (내장 자체 테스트의 low overhead를 위한 공간 압축기 설계)

  • Jung, Jun-Mo
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.9
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    • pp.2378-2387
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    • 1998
  • This thesis proposes a design algorithm of an efficient space response compactor for Built-In Self-Testing of VLSI circuits. The proposed design algorithm of space compactors can be applied independently from the structure of Circuit Cnder Test. There are high hardware overhead cost in conventional space response compactors and the fault coverage is reduced by aliasing which maps faulty circuit's response to fault-free one. However, the proposed method designs space response compactors with reduced hardware overheads and does not reduce the fault coverage comparing to conventional method. Also, the proposed method can be extended to general N -input logic gate and design the most efficient space response L'Ompactors according to the characteristies of output sequence from CUT. The prolxlsed design algorithm is implemented by C language on a SUN SPARC Workstation, and some experiment results of the simulation applied to ISCAS'85 benchmark circuits with pseudo random patterns generated bv LFSR( Linear Feedback Shift Register) show the efficiency and validity of the proposed design algorithm.

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Common Rail Pressure Control Algorithm for Passenger Car Diesel Engines Using Quantitative Feedback Theory (QFT를 이용한 디젤엔진의 커먼레일 압력 제어알고리즘 설계 연구)

  • Shin, Jaewook;Hong, Seungwoo;Park, Inseok;Sunwoo, Myoungho
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.38 no.2
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    • pp.107-114
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    • 2014
  • This paper proposes a common rail pressure control algorithm for passenger car diesel engines. For handling the parameter-varying characteristics of common rail systems, the quantitative feedback theory (QFT) is applied to the design of a robust rail pressure control algorithm. The driving current of the pressure control valve and the common rail pressure are used as the input/output variables for the common rail system model. The model parameter uncertainty ranges are identified through experiments. Rail pressure controller requirements in terms of tracking performance, robust stability, and disturbance rejection are defined on a Nichols chart, and these requirements are fulfilled by designing a compensator and a prefilter in the QFT framework. The proposed common rail pressure control algorithm is validated through engine experiments. The experimental results show that the proposed rail pressure controller has a good degree of consistency under various operating conditions, and it successfully satisfies the requirements for reference tracking and disturbance rejection.

Digit-serial VLSI Architecture for Lifting-based Discrete Wavelet Transform (리프팅 기반 이산 웨이블렛 변환의 디지트 시리얼 VLSI 구조)

  • Ryu, Donghoon;Park, Taegeun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.157-165
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    • 2013
  • In this paper, efficient digit-serial VLSI architecture for 1D (9,7) lifting-based discrete wavelet transform (DWT) filter has been proposed. The proposed architecture computes the DWT in digit basis, so that the required hardware is reduced. Also, the multiplication is replaced with the shift and add operation to minimize the hardware requirement. Bit allocation for input, output, and the internal data has been determined by analyzing the PSNR. We have carefully designed the data feedback latency not to degrade the performance in the recursive folded scheduling. The proposed digit-serial architecture requires small amount of hardware but achieve 100% of hardware utilization, so we try to optimize the tradeoffs between the hardware cost and the performance. The proposed architecture has been designed and verified by VerilogHDL and synthesized by Synopsys Design Compiler with a DongbuHitek $0.18{\mu}m$ STD cell library. The maximum operating frequency is 330MHz with 3,770 gates in equivalent two input NAND gates.

A 5-Gb/s CMOS Optical Receiver with Regulated-Cascode Input Stage for 1.2V Supply (1.2V 전원전압용 RGC 입력단을 갖는 5-Gb/s CMOS 광 수신기)

  • Tak, Ji-Young;Kim, Hye-Won;Shin, Ji-Hye;Lee, Jin-Ju;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.3
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    • pp.15-20
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    • 2012
  • This paper presents a 5-Gb/s optical receiver circuit realized in a $0.13-{\mu}m$ CMOS technologies for the applications of high-speed digital interface. Exploiting modified RGC input stage at the front-end transimpedance amplifier, interleaving active feedback and source degeneration techniques at the limiting amplifier, the proposed optical receiver chip demonstrates the measured results of $72-dB{\Omega}$ transimpedance gain, 4.7-GHz bandwidth, and $400-mV_{pp}$differential output voltage swings up to the data rate of 5-Gb/s. Also, the chip dissipates 66mW in total from a single 1.2-V supply, and occupies the area of $1.6{\times}0.8mm^2$.

m-Health System for Processing of Clinical Biosignals based Android Platform (안드로이드 플랫폼 기반의 임상 바이오신호 처리를 위한 모바일 헬스 시스템)

  • Seo, Jung-Hee;Park, Hung-Bog
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.7
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    • pp.97-106
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    • 2012
  • Management of biosignal data in mobile devices causes many problems in real-time transmission of large volume of multimedia data or storage devices. Therefore, this research paper intends to suggest an m-Health system, a clinical data processing system using mobile in order to provide quick medical service. This system deployed health system on IP network, compounded outputs from many bio sensing in remote sites and performed integrated data processing electronically on various bio sensors. The m-health system measures and monitors various biosignals and sends them to data servers of remote hospitals. It is an Android-based mobile application which patients and their family and medical staff can use anywhere anytime. Medical staff access patient data from hospital data servers and provide feedback on medical diagnosis and prescription to patients or users. Video stream for patient monitoring uses a scalable transcoding technique to decides data size appropriate for network traffic and sends video stream, remarkably reducing loads of mobile systems and networks.

A Novel Dual-Layer Differential Equal Gain Transmission Technique Using M-PSK Constellations (M-PSK 성운을 이용한 새로운 이중계층 차분 동 이득 전송 기술)

  • Kim, Young-Ju;Seo, Chang-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.7
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    • pp.627-635
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    • 2015
  • We propose a dual-layer differential equal-gain codebook design methodology for LTE-Advanced(LTE-A), IEEE802.ac, and radar system having multiple transmit and receive antennas, and make computer simulations to evaluate its link-level performaces. M-ary phase shift keying constellation is used as its codeword elements to utilize low-cost power amplifiers at mobile stations. Especially, the proposed codebook can meet radar systems requirement for the high-powered equal-gain transmission property. Due to the temporal correlation of the adjacent channel, the proposed differential codebook can quantize only the differential information of the channel instead of the whole channel subspace, which virtually increase the codebook size to realize more accurate quantization of the channel. The proposed codebook has the same properties of LTE codebook that is, constant modulus, complexity reduction, and nested property. Computer simulations show that the proposed codebook performs better than the conventional 8-ary codebooks with the same amount of feedback information.

A Nonlinear Speed Control for a Permanent Magnet Synchronous Motor Using a Simple Disturbance Estimation Technique (외란 관측기를 이용한 영구자석 동기전동기의 비선형 속도 제어)

  • 이나영;김경화;윤명중
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.2
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    • pp.149-157
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    • 2001
  • A nonlinear speed control for a permanent magnet synchronous motor (PMSM) using a simple disturbance estimation technique is presented. By using a feedback linearization scheme, the nonlinear motor model can be linearized in a controllable canonical form, and the desired speed dynamics can be obtained based on the linearized model. This technique, however, gives an undesirable output performance under the mismatch of the system parameters and load conditions. To cancel disturbance by parameter variation, the controller parameters will be estimated by using a disturbance observer theory where the disturbance torque and flux linkage are estimated. since only the two reduced order observers are used for the parameter estimations, the observer designs are considerably simple and the additional load for computation of the controller is negligibly small. The proposed control scheme is implemented on a PMSM using DSP TMS320C31 and the effectiveness is verified through the comparative simulations and experiments.

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