• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.34 no.4
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• pp.83-88
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• 2006

One of the most important works in the development of military aircraft is to construct and utilize the various technical data and information needed in the design, analysis and evaluation under integrated system structure. A vast and various data in oder to optimize cockpit design is needed in geometric & arrangement design, vision analysis and escape system design. In addition, the application of ergonomics cockpit design concept based on the sorts of human elements and anthropometric data as design consideration for pilots is required. To accomplish above these activities, the data gathered and formed through the aircraft development program was become database and developed by tool to be able to support ergonomics cockpit design work.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1195-1201
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• 2005

This paper deals with procedures and results for teal time implementation of G.729 speech coder and channel coder including convolution codec, viterbi decoder, and interleaver using a fixed point DSP chip for radio communication systems. We described the method for real-time implementation based on integer simulation results and explained the implemented results by quality performance and required complexity for real-time operation. The required complexity was 24MIPS and 9MIPS in computational load, and 12K words and 4K words in execution code length for speech and channel. The functional evaluation was performed into two steps. The one was bit exact comparison with a fixed point C code, the other was executed by actual speech samples and error test vectors. Unlik other results such as individual implementation, We implemented speech and channel coders on a DSP chip with 160MIPS computation capability and 64 K words memory on chip. This results outweigh the conventional methods in the point of system complexity and implementation cost for radio communication system.

• Journal of Korean Ophthalmic Optics Society
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• v.8 no.1
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• pp.35-39
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• 2003

The display technology on the retina is the key role in inspecting the condition of the patients. 2-dimensional retina image is widely used in the eye examination as of today. Recently, 3-dimensional retina image ones have been introduced to this area, but the quality of the image is not fully satisfied to the operator. For the purpose of developing 3-D retina imaging instrument, the optimization of a 3-D retina imaging system using Code-V tool was investigated in this thesis. He-Ne laser having the wavelength 632.8 nm was used to make a power source to detect the retina. Several lenses and mirrors installed on sledge which were developed to perform focus control on 3-D device were designed to make a beam focusing and direct line. Polygon scanner having 24 mirror facets and galvanometer making tilting movement were utilized to make a 2-D laser plane. Also, design of eye ball had been fulfilled to see the focus of the 2-D plane. Reflected ray from retina detected on the sensor array with the same path. All cognitive components were optimized for aberration correction in order to focus on retina. Results of optimization were compared to those of initial designed optics system. On the basis of above results, the result of third aberration has been corrected to stable values to the optical system. MTF evaluating the resolution of an image has been closely correlated to the diffraction limit and PSF indicating the strength distribution of an image has shown the SR value as 0.9998 having high performance. The possibility of new and powerful 3-D retina image instrument was verified by simulating each component of the instrument by Code-V.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1997.11a
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• pp.151-156
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• 1997

본 논문은 저비용이면서 정확한 제어를 수행하는 새로운 퍼지 제어기의 VHDL 설계 및 FPGA 구현을 자동적으로 수행하는 통합 개발 환경(IDE : Integrated Development Environment)을 다룬다. 이를 위해 FLC의 자동 설계 및 구현의 전 과정을 하나의 환경 내에서 개발 가능하게 하는 퍼지 제어기 자동 설계 및 구현 시스템 (FLC Automatic Design and Implementation Station :FADIS)을 개발하였는데 이 시스템은 다음 기능을 포함한다. (1) 원하는 퍼지 제어기의 설계 파라메터를 입력받아 이로부터 FLC를 구성하는 각 모듈의 VHDL 코드를 자동적으로 생성한다. (2) 생성된 각 모듈의 VHDL 코드가 원하는 동작을 수행하는지를 Synopsys사의 VHDL Simulator상에서 시뮬레이션을 수행한다. (3) Synopsys사의 FPGA Compiler에 의해 VHDL 코드를 합성하여 FLC의 각 구성 모듈을 얻는다. (4) 합성된 모듈은 Xilinx사의 XactSTep 6.0에 의해 최적화 및 배치, 배선이 이루어진다. (5) 얻어진 Xilinx rawbit 파일은 VCC사의 r2h에 의해 C 언어의 header 파일 형태의 하드웨어 object로 변환된다. (6) 하드웨어 object를 포함하는 응용 제어 프로그램의 실행 파일을 재구성 \ulcorner 능한 FPGA 시스템 상에 다운로드한다. (7) 구현된 FLC의 동작 과정은 구현된 FLC와 제어 target 사이의 상호 통신에 의해 모니터링한다. 트럭 후진 주차 제어에 사용하는 퍼지 제어기 설계 및 구현의 전 과정을 FADIS상에서 수행하여 FADIS가 완전하게 동작하는지를 확인하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.254-254
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• 2010

기존의 부유게이트를 이용한 플래시 메모리는 소자의 크기를 줄이는데 한계가 있기 때문에 이를 해결하기 위한 비휘발성 메모리 소자로 CTF가 큰 관심을 받고 있다. CTF 메모리 소자는 기존의 플래쉬 메모리 소자에 비해 쓰고 지우는 속도가 빠르고, 데이터의 저장 기간이 길며, 쓰고 지우는 동작에 의한 전계 스트레스에 잘 견뎌내는 장점을 가지고 있다. 최근 터널 장벽의 두께와 종류를 변화시킨 소자의 전기적 특성을 향상하기 위한 연구들은 많이 있었지만, 터널 장벽의 적층구조 변화에 대한 연구는 비교적 적다. 본 연구에서는 터널 장벽의 적층구조 변화에 따른 CTF 메모리 소자의 프로그램 동작 특성 변화에 대해 관찰하였다. 기존의 단일 산화막 (silicon oxide; O) 대신 산화막과 higk-k 물질인 질화막 (silicon nitride; N)을 조합하여 ON, NON, ONO로 터널 장벽의 여러 가지 적층 구조를 가진 소자를 설계하여 각 소자의 프로그램 동작 특성을 조사하였다. CTF 메모리 소자의 프로그램 동작 특성을 거리와 시간에 따른 연속방정식, Shockley-Read-Hall 유사 트랩 포획 방정식 및 푸아송 방정식을 유한차분법을 사용하여 수치해석으로 분석하였다. WKB 근사를 이용하여 인가된 전계의 크기에 따라 터널링 현상에 의해 트랩층으로 주입하는 전자의 양을 계산하였다. 또한, 터널 장벽의 적층구조 변화에 따른 트랩층의 전도대역과 트랩층 내부에 분포하는 전자의 양을 시간에 따라 계산하였다. 계산 결과에서 터널 장벽의 적층구조 변화가 CTF 메모리 소자의 프로그램 동작 특성에 미치는 영향을 알 수 있었다. 소자의 프로그램 동작 특성을 분석함으로써 CTF 메모리 소자에 적합한 터널 장벽의 구조를 알 수 있었다. 기존의 단일 산화막보다 얇아진 산화막의 두께와 낮은 질화막의 에너지 장벽 높이로 전자의 터널링 현상이 더 쉽게 일어나기 때문에 ON 구조로 터널 장벽을 적층한 CTF 메모리 소자의 프로그램 속도가 가장 빠르게 나타났다. 이러한 결과는 터널 장벽의 구조적 변화가 전자의 터널 효과에 미치는 영향을 이해하고 프로그램 동작 속도가 빠른 CTF 메모리 소자의 최적화에 도움을 줄 수 있다.

• Journal of IKEEE
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• v.23 no.2
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• pp.739-742
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• 2019

In this paper, we propose enhanced DAP(Dose Area Product). The development of enhanced DAP proposed in this paper has optimized the area dose meter that was developed previously. The development of enhanced DAP performed Optimized design of charge integrator and ADC circuit, optimization of line transceiver for RS-485 communication, optimization of display circuit, and optimization of PC-based control program for interlocking and aging. As a result of evaluating the performance of the proposed system in an accredited testing laboratory, Radiation dose dependence and Radiation quality dependence were measured to be 4.2%, which is below ${\pm}15%$ of international standard. Energy range/Tube voltage was confirmed in the range of 30~150kV. The sensitivity difference between sensor field and sensor field area dose sensitivity was measured to be 4.3%, and it was confirmed that it operates normally under ${\pm}15%$ of international standard. In order to measure the reproducibility of the area dosimeter, it was confirmed that it was 0% and it was operated normally at less than 2% of IEC60580 recommendation. Digital resolution was confirmed to be a minimum unit of $0.01{\mu}Gy{\cdot}m^2$ within the error range for the reference dose per hour.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.2
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• pp.139-148
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• 2013

In this study, an ejector was designed to recirculate the anodic off-gas of SOFC, and a parametric study of the system performance was conducted at various ejector entrainment ratios. Aspen Plus, a chemical engineering program, was used to calculate the operational conditions of the ejector. To minimize the calculation load of the CFD and to ensure the global optimum, a genetic algorithm and Kriging model were used for the optimization. The optimization results showed that the dominant design variables of the sonic ejector are the throat diameter and the first flow nozzle position. The designed ejector has enough flexibility for different operating conditions of a 1-kW SOFC system. When the ejector was applied to the SOFC, it reduced 56% of the steam and 8.4% of the fuel compared to the reference case.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.11 no.5
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• pp.116-124
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• 2012

In this paper, we propose an efficient lighting control system design for AVR based LSDM control. This paper, an efficient lighting control system design for LSDM control be design divided as the signal control part for I/O data bus and the timer/counter part for clock signal control according to operating conditions. LSDM control logic be optimization to PORTx and DDRx register by specifying the logical value of each bit for effective control signal processing. And, the LSDM control signal by lighting control program execution of ATmega128 be designed to be LSDM lighting control by control logic operating. In this paper, a proposed lighting control system were measured to power loss rate to proved the power loss reduction about lighting status of LSDM control logic by download the lighting control program to system through serial from host PC. As a measurement result, a proposed lighting control system than the existing lighting control system were proved to be effective to the overall power consumption reduction.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2011.04a
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• pp.144-152
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• 2011

In order to investigate the operation performance behaviors of the UAV's propulsion system to be operated long time in high altitude, the engine performance tests, which are simulated in the altitude engine test facility should be needed. If the test is performed in a existing altitude engine test facility, additional test apparatuses are required. Among them a proper design of the inlet and exhaust ducts that may directly affect the engine performance is very important. If the design is not adequate, the engine performance loss due to the flow behavior change and the pressure loss may be not similar to the real engine performance. In this work, firstly the engine inlet and exhaust ducts to be mounted to the existing altitude facility are modelled in 3D and its flow behaviors and pressure losses are analyzed using a commercial CFD tool, ANSYS's CFX, and the engine performance with the duct losses is calculated using the performance analysis program developed by C. Kong et al. Finally, the optimized inlet and exhaust ducts' configurations are proposed through the repeated analyses of various duct configurations.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.4
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• pp.337-342
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• 2016

A spudcan is mounted on the lower leg of the jack-up rig, a device for preventing a rollover of a structure and to support the structure in a stable sea floor. At the time of inserting the surface of the spud can to penetrate when the sand layer is stable and smoothly pulled to the clay layer, and at that time of recovery when uploading the spud can is equipped with a water injection device. In this study, it is significant to optimize the shape of pipelines holes for water injection device and it was set in two kinds of shape, the oval and round. Interpretation of the subject into the site of Gulf of Mexico offshore Wind Turbine Installation Vessels (WTIV) was chosen as a target platform. Using the ANSYS Workbench commercial programs, optimal design was conducted. The results of this study can be applied to the hole-shaped design of various marine structures.