• Title/Summary/Keyword: 채널 차단

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An Effective Method to Form Side-Lobe Blanking Beam of Fully Digital Active Phased Array Antenna (완전 디지털 능동위상배열 안테나의 효과적인 부엽 차단 빔 형성 방법)

  • Joo, Joung-Myoung;Park, Jongkuk;Lim, Jae-Hwan;Lee, Jae-Min
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.4
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    • pp.59-65
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    • 2022
  • In this paper, a digital active phased array antenna is briefly introduced and beam forming method for a dual-channel side-lobe blanking applied to blank the side-lobe of the main beam is described. Next, the antenna performance was verified from results of design and antenna near-field measurement for the antenna main beam and side-lobe blanking beam. Then, a single-channel side-lobe blanking beam forming method was proposed to reduce the number of channels than the existing system operating dual-channel side-lobe blanking beam and weight distribution for each element of the side-lobe blanking antenna was designed with the proposed method. Finally, the designed single-channel side-lobe blanking beam pattern and blanking ability were verified and compared with the dual-channel side-lobe blanking beam. In addition, by comparing/verifying the conventional dual-channel and the proposed single-channel side-lobe blanking beam patterns measured through the receiving near-field test of the digital active phased array antenna and their ability to blank side-lobe of the main beam, validity of the proposed method for forming single-channel side-lobe blanking beam was confirmed.

Analysis of Off Current for Conduction Path of Asymmetric Double Gate MOSFET (전도중심에 따른 비대칭 이중게이트 MOSFET의 차단전류 분석)

  • Jung, Hakkee;Kwon, Ohshin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.759-762
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    • 2014
  • 비대칭 이중게이트(double gate; DG) MOSFET는 단채널 효과를 감소시킬 수 있는 새로운 구조의 트랜지스터이다. 본 연구에서는 비대칭 DGMOSFET의 전도중심에 따른 차단전류를 분석하고자 한다. 전도중심은 채널 내 캐리어의 이동이 발생하는 상단게이트에서의 평균거리로써 상하단 게이트 산화막 두께를 달리 제작할 수 있는 비대칭 DGMOSFET에서 산화막 두께에 따라 변화하는 요소이며 상단 게이트 전압에 따른 차단전류에 영향을 미치고 있다. 전도중심을 구하고 이를 이용하여 상단 게이트 전압에 따른 차단전류를 계산함으로써 전도중심이 차단전류에 미치는 영향을 산화막 두께 및 채널길이 등을 파라미터로 분석할 것이다. 차단전류를 구하기 위하여 포아송방정식으로부터 급수 형태의 해석학적 전위분포를 유도하였다. 결과적으로 전도중심의 위치에 따라 차단전류는 크게 변화하였으며 이에 따라 문턱전압 및 문턱전압이하 스윙이 변화하는 것을 알 수 있었다.

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A Traffic Distribution for Blocking Rate Improvement (통화차단율 개선을 위한 트래픽 분산)

  • 조순계;은명의;김종교
    • The Journal of the Acoustical Society of Korea
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    • v.17 no.2
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    • pp.63-70
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    • 1998
  • 특정 기지국에 호가 집중하는 경우, 통화차단율 증가로 인한 가입자에 대한 서비스 의 저하를 해결할 수 없다. 따라서 근접 기지국에 할당된 채널의 상당부분을 특정 기지국이 공용하도록 함으로서 채널이용률을 최대화하고 통화차단율을 최소화할 수 있는 중계망 구성 에 대한 연구가 절실히 요구된다. 본 논문에서는 특정 기지국에 발생하는 집중호를 근접 기 지국에 균등 분배케 함으로서 통화차단율을 최소화하고 가입자에 대한 통화서비스를 향상시 킬 수 있는 중계망 운용 알고리듬을 제안하고 컴퓨터 시뮬레이션을 통해 그 개선 정도를 확 인한다.

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Tunneling Current of Sub-10 nm Asymmetric Double Gate MOSFET for Channel Doping Concentration (10 nm 이하 비대칭 DGMOSFET의 채널도핑농도에 따른 터널링 전류)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.7
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    • pp.1617-1622
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    • 2015
  • This paper analyzes the ratio of tunneling current for channel doping concentration of sub-10 nm asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current in subthreshold region increases in the region of channel length of 10 nm below. Even though asymmetric DGMOSFET is developed to reduce short channel effects, the increase of tunneling current in sub-10 nm is inevitable. As the ratio of tunneling current in off current according to channel doping concentration is calculated in this study, the influence of tunneling current to occur in short channel is investigated. To obtain off current to consist of thermionic emission and tunneling current, the analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for channel doping concentration in sub-10 nm asymmetric DGMOSFET, specially with parameters of channel length, channel thickness, and top/bottom gate oxide thickness and voltage.

Determination of $Na^+$ Channel Blocker in Seaweed (해조류 내 $Na^+$ 챈널 차단 생리활성물질의 측정)

  • 유종수;천병수;김남길
    • Korean Journal of Environmental Biology
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    • v.19 no.2
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    • pp.107-112
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    • 2001
  • A tissue biosensor was developed for the continuous determination of $Na^+$ channel blockers. The proposed sensor was applied to the determination of Na+ channel blockers in seaweed. It was found that $Na^+$ channel blocker content displayed seasonal variation; it was high from February to April and decreased thereafter (May - August). From these results the present proposed method may be used for high sensitive determination of $Na^+$ channel blockers contained in the seaweed organisms and environments. Therefore, it may be important to monitor $Na^+$ channel blocker content of seaweed throughout the year.

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A Group Search-based Distributed Dynamic Channel Allocation Algorithm in Uplink Cellular System (상향링크 셀룰러 시스템에서 그룹 탐색 기반의 분산동적채널할당 방법)

  • Yoo, Doh-Kyoung;Kim, Dong-Hoi
    • Journal of Broadcast Engineering
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    • v.15 no.3
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    • pp.407-413
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    • 2010
  • In DCA (Dynamic Channel Allocation) scheme of uplink cellular system appling a frequency reuse factor of one, when a new call requests a channel, the new call will be blocked if its SINR (Carrier to Noise and Interference Ratio) is less than the required SINR or there is no available channel. The additional channel allocation for the blocked new call can be performed with channel borrowing in the adjacent cells. The channel borrowing causes the CCI (Co-Channel Interference), thus the SINR of the existing calls is deteriorated and the channel reallocation for the existing calls is required. As a result, the channel borrowing leads to a complex calculation so that it is a NP-hard problem. Therefore, to overcome the problem, we propose a novel Group Search-based DCA scheme which decreases the number of the blocked new calls and then reduces the number of the channel reallocation by the channel borrowing for the blocked new calls. The proposed scheme searches the all channels in a group of the adjacent cells and home cell at the same time in order to minimizes the number of the blocked new calls. The simulation results show that proposed Group Search-based DCA scheme provides better new call blocking probability and system throughput than the existing Single Search-based DCA scheme which searches only the channels in home cell.

Analysis on Forward/Backward Current Distribution and Off-current for Doping Concentration of Double Gate MOSFET (DGMOSFET의 도핑분포에 따른 상 · 하단 전류분포 및 차단전류 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.10
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    • pp.2403-2408
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    • 2013
  • This paper has analyzed the change of forward and backward current for channel doping concentration to analyze off-current of double gate(DG) MOSFET. The Gaussian function as channel doping distribution has been used to compare with experimental ones, and the two dimensional analytical potential distribution model derived from Poisson's equation has been used to analyze the off-current. The off-current has been analyzed for the change of projected range and standard projected range of Gaussian function with device parameters such as channel length, channel thickness, gate oxide thickness and channel doping concentration. As a result, this research shows the off-current has greatly influenced on forward and backward current for device parameters, especially for the shape of Gaussian function for channel doping concentration.

Optimal Design of ESD Protection Device with different Channel Blocking Ion Implantation in the NSCR_PPS Device (NSCR_PPS 소자에서 채널차단 이온주입 변화에 따른 최적의 정전기보호소자 설계)

  • Seo, Yong-Jin;Yang, Jun-Won
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.21-26
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    • 2016
  • The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different implant of channel blocking region was discussed for high voltage I/O applications. A conventional NSCR standard device shows low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified channel blocking structure demonstrate the improved ESD protection performance as a function of channel implant variation. Therefore, the channel blocking implant was a important parameter. Since the modified device with CPS_PDr+HNF structure satisfied the design window, we confirmed the applicable possibility as a ESD protection device for high voltage operating microchips.

The blocking channel to reduce the performance decrease using the low correlation with cyclic delay scheme in LED-ID system (LED-ID 시스템에서 채널 차단에 따른 성능 열화를 줄이기 위한 저 상관 순환 지연 기법)

  • Lee, Kyu-Jin;Kim, Gui-Jung
    • Journal of Digital Convergence
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    • v.13 no.10
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    • pp.319-325
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    • 2015
  • We proposed the blocking channel to reduce the performance decrease using the low correlation with cyclic delay scheme in LED-ID system. LED-ID is based on the visible light to transmit the data. However, It is occurred the block channel by structure or environment of indoor for light of straightness. LED-ID system is degraded the performance by the block channel as loss of data, and burst error. To solve the block channel, the proposed system is overcome the burst error by low correlation among data, which is able to obtain the maximize time diversity gain to improve the performance of BER by cyclic delay scheme. The BER performance is evaluated by computer simulation according to channel parameter. The simulation results shows that proposed system gives much better performance than conventional system and constant cyclic delay scheme system.

Analysis of Conduction-Path Dependent Off-Current for Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 차단전류에 대한 전도중심 의존성 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.3
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    • pp.575-580
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    • 2015
  • Asymmetric double gate(DG) MOSFET is a novel transistor to be able to reduce the short channel effects. This paper has analyzed a off current for conduction path of asymmetric DGMOSFET. The conduction path is a average distance from top gate the movement of carrier in channel happens, and a factor to change for oxide thickness of asymmetric DGMOSFET to be able to fabricate differently top and bottom gate oxide thickness, and influenced on off current for top gate voltage. As the conduction path is obtained and off current is calculated for top gate voltage, it is analyzed how conduction path influences on off current with parameters of oxide thickness and channel length. The analytical potential distribution of series form is derived from Poisson's equation to obtain off current. As a result, off current is greatly changed for conduction path, and we know threshold voltage and subthreshold swing are changed for this reasons.