• Title/Summary/Keyword: 지피에스/갈릴레오 복합수신기

Search Result 1, Processing Time 0.017 seconds

A Study on the Implementation and Performance Analysis of FPGA Based Galileo E1 and E5 Signal Processing (FPGA 기반의 갈릴레오 E1 및 E5 신호 처리 구현 및 성능에 관한 연구)

  • Sin, Cheon-Sig;Lee, Sang-Uk;Yoon, Dong-Weon;Kim, Jae-Hoon
    • Journal of Satellite, Information and Communications
    • /
    • v.4 no.1
    • /
    • pp.36-44
    • /
    • 2009
  • The key technologies of GNSS receiver for GNSS sensor station are under development as a part of a GNSS ground station in ETRI. This paper presents the GNSS receiver implementation and signal processing result which is implemented based on FPGA to process the Galileo E1 and E5 signal. To verify the working and performance for GNSS receiver which is implemented based on FPGA, live signal received from GIOVE-B which is second test satellite is used. We gather GIOVE-B signal by using prototyping antenna and RF/IF units including IF-component. To verify Galileo E1 and E5 signal processing function from GIOVE-B, FPGA based signal processing module is implemented as a prototyping hardware board.

  • PDF