• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.3
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• pp.47-54
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• 2001

This study is to analyze the impedance response in human body by acoustic stimulation on acupoints and contrast parte; for objectification of the meridian substance. It is to verify meridian pathway and channel theory or bio-energy in body. This paper proposes to make an hypothesis about the underground water theory. The meridian has not tube or pipe line type channel but bio-energy flow along the channel similar to flowing pattern of underground water in body. It was analyzed the current characteristic or impedance response after acoustic stimulation by sound wave of 5 specific tones. The response characteristics of current stimulation are measured by the average current magnitude and variation ratio or meridian. The current variation ratio or Live Meridian(gung) 33.2%, Heart Meridian(sang) 30.7% Kidney Meridian (gak) 33.1%, Spleen Meridian(chi) 33.9%, Lung Meridian (wo) 30.7% are to be compared to contrast parts (non-acupoint and meridian). In experimental results, meridian is discrimination to non-meridian, and 5 vital meridians have a reciprocal relationship with sound wave of 5 specific tones.

• 전자공학회논문지 IE
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• v.48 no.2
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• pp.6-11
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• 2011

This paper describes the design of new method of propagation delay measurement in micro and nanostructures during characterization of ASIC standard library cell. Providing more accuracy timing information about library cell (NOR, AND, XOR, etc.) to the design team we can improve a quality of timing analysis inside of ASIC design flow process. Also, this information could be very useful for semiconductor foundry team to make correction in technology process. By comparison of the propagation delay in the CMOS element and result of analog SPICE simulation, we can make assumptions about accuracy and quality of the transistor's parameters. Physical implementation of phase error accumulation method(PHEAM) can be easy integrated at the same chip as close as possible to the device under test(DUT). It was implemented as digital IP core for semiconductor manufacturing process($0.11{\mu}m$, GL130SB). Specialized method helps to observe the propagation time delay in one element of the standard-cell library with up-to picoseconds accuracy and less. Thus, the special useful solutions for VLSI schematic-to-parameters extraction (STPE), basic cell layout verification, design simulation and verification are announced.

• 전자공학회논문지 IE
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• v.47 no.3
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• pp.41-46
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• 2010

WSN, or Wireless Sensor Network, consists of a multitude of inexpensive micro-sensors. Because the batteries in sensor nodes can not be replaced once they are deployed, the life of a WSN is absolutely determined by the batteries. So, energy efficiency of a network is a critical factor for long-life operation. LEACH protocol which divides WSN into two groups is a typical routing protocol based on the clustering scheme for the efficient use of limited energy. It is composed of round units which are separated into set-up and steady state. In this paper we propose a power saving scheme to minimize set-up phase itself and to involve a data comparison algorithm. We evaluate the performance of the proposed scheme in comparison with original LEACH protocol. Simulation results validate our scheme has better performance in terms of the number of alive nodes as time evolves and average energy dissipated.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.1
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• pp.55-61
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• 2008

A real-time three-dimensional vision is a passive system, which would support various applications including collision avoidance, home networks. It is a good alternative of active systems, which are subject to interference in noisy environments. In this paper, we designed a SAD correlator with respect to resource usage for a real-time three-dimensional vision system. Regular structures, linear data flow and abundant parallelism make the correlation algorithm a good candidate for a reconfigurable hardware. We implemented two versions of SAD correlator in HDL and synthesized them to determine resource requirements and performance. From the experiment we show that the SAD correlator fits into reconfigurable hardware in marginal cost and can handle about 30 frames/sec with $640{\times}480$ images.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.141-149
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• 2013

IETF 6LoWPAN standard technique has been studied in IoT environment to support the IPv6 packet communication. 6LoWPAN protocol for transmission of packets mainly in the AODV routing protocol and a variety of extended techniques have been investigated. In particular, consisting of nodes with limited resources in a network error occurs when the 6LoWPAN reliable data transfer and fast routing method is needed. To this end, in this paper, we propose resilient routing protocol and extension of IETF LOAD algorithm, for optimal recovery path, More specifically, the optimal recovery path setup algorithm, signal flow, and detailed protocols for the verification of the reliability of packet transmission mathematical model is presented. The proposed protocol techniques to analyze the performance of the NS-3 performance through the simulation results that is end-to-end delay, throughput, packet delivery fraction and control packet overhead demonstrated excellence in comparison with existing LOAD.

• The Journal of Society for e-Business Studies
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• v.15 no.4
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• pp.101-121
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• 2010

This paper presents an intelligent prefetching technique that significantly improves performance of hybrid fash-disk storage, a combination of flash memory and hard disk. Since flash memory embedded in a hybrid device is much faster than hard disk in terms of I/O operations, it can be utilized as a 'cache' space to improve system performance. The basic strategy for prefetching is to utilize sequential pattern mining, with which we can extract the access patterns of objects from historical access sequences. We use two techniques for enhancing the performance of hybrid storage with prefetching. One of them is to modify a FAST algorithm for mapping the flash memory. The other is to extend the unit of prefetching to a block level as well as a file level for effectively utilizing flash memory space. For evaluating the proposed technique, we perform the experiments using the synthetic data and real UCC data, and prove the usability of our technique.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.5
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• pp.44-56
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• 2009

Multimedia streaming service is susceptible to loss and delay of data as it requires high bandwidth and real time processing. Therefore QoS cannot be guaranteed due to data loss caused by heavy network traffic and error of wireless channel. To solve these problems, studies about algorithms which improve the quality of multimedia by serving differently according to the priority of packets in multimedia stream. Two algorithms are proposed in this paper. The first algorithm proposed is WMS-1(Wireless Multimedia Scheduling-1) algorithm which acts like IWFQ when any wireless loss is occurred but assigns channels first in case of urgent situation like when the running time of multimedia runs out. The second algorithm proposed is WMS-2(Wireless Multimedia Scheduling-2) algerithm that assigns priority to multimedia flow and schedules flow that has higher priority according to type of frame first. The comparison with other existing scheduling algorithms shows that multimedia service quality of the proposed algorithm is improved and the larger the queue size of base station is, the better total quality of service and fairness were gained.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.10
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• pp.49-54
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• 2007

As digital contents based on 3D graphics are increased, the requirement for low power 3D graphic hardware for mobile devices is increased. We design a transformation engine for mobile 3D graphic processor. We propose a simplified transformation engine for mobile 3D graphic processor. The area of the transformation engine is reduced by merging a mapping transformation unit into a projective transformation unit and by replacing a clipping unit with a selection unit. It consists of a viewing transformation unit a projective transformation unit a divide by w nit, and a selection unit. It can process 32 bit floating point format of the IEEE-754 standard or a reduced 24 bit floating point format. It has a pipelined architecture so that a vertex is processed every 4 cycles except for the initial latency. The RTL code is verified using an FPGA.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.7
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• pp.9-19
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• 2004

WLAN (Wireless Local Area Networks) needs error recovery and flow control schemes to support reliable multicast protocol. Limited wireless bandwidth, as well as queuing losses caused by the asymmetric wired/wireless interactions, demands more effective approaches for reducing packet losses. Moreover, since the wireless channel is a shared broadcast medium, if sender receives feedback information simultaneously from several receivers, the feedback delays data frame transmission of forward direction by introducing channel congestion and burden at the sender. Therefore, it is important to minimize the amount of feedback information from receivers. In this paper, we propose an ARS(Adaptive Redundancy Scheme) that combines FEC(Forward Error Correction) using channel state estimation and ARQ(Automatic Repeat Request) both to reduce the amount of feedback information and the number of retransmissions and to guarantee high data reliability in a WLAN multicast environment. Performance of the proposed scheme is evaluated by means of analysis and simulations in AWGN and Rayleigh fading channels. The results show that the proposed scheme reduces the amount of feedback information and the number of retransmissions and guarantees high data reliability, while keeping throughput efficiency similarly with the conventional FEC and ARQ scheme.

• Korean Journal of Food Science and Technology
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• v.41 no.4
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• pp.369-373
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• 2009

${\alpha}$-Waxy corn starch was used as a feed for twin-screw extrusion in order to enhance starch liquefaction with added thermostable ${\alpha}$-amylase (derived from Bacillus licheniformis). The residence time distribution and starch liquefaction were investigated. The starch liquefaction was analyzed in terms of reducing sugar contents, molecular size from gel permeation chromatography (GPC), and microstructure from scanning electron microscopy (SEM). The use of ${\alpha}$-starch contributed to the production of more reducing sugar than the use of raw starch use alone. From GPC, the effect of ${\alpha}$- starch on the molecular size reduction was shown to be small. From SEM, irregular and damaged surface were observed on the extrudate from ${\alpha}$-starch, as compared to those from raw starch. The spread of residence time distribution curves was greater with feed of ${\alpha}$-starch than raw starch, indicating that ${\alpha}$-starch was hard to flow forward during extrusion. This could be improved by increasing the feed moisture content and barrel temperature of extruder.