• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1047-1053
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• 2011

In this paper, we proposed an HF-band wireless power transfer system with adaptive frequency control circuit for efficiency enhancement in a short range. In general, a wireless power transfer system shows an impedance mismatching due to a reflected impedance, because a coupling coefficient is varied with respect to separation distance between two resonating loop antennas. The proposed method can compensate this impedance mismatching by varying input frequency of a voltage-controlled oscillator adaptively with respect to separation distance. Therefore, transmission efficiency is enhanced in a short distance, where large impedance mismatch occurs. The adaptive frequency circuit consists of a directional coupler, a detector, and a loop filter. In order to demonstrate the performance of the proposed system, a wireless power transfer system with adaptive frequency control circuits is designed and implemented, which has a pair of loop antennas with a dimension of 30${\times}$30 $cm^2$. From measured results, the proposed system shows enhanced efficiency performance than the case without adaptive frequency control.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2005.05a
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• pp.914-921
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• 2005

신제품으로 개발 중인 초소형 CMOS RF 전압 제어발진기(VCO) IC 에 대한 공인된 시험 규격은 현재 개발되어 있지 않다. 또한 제조업체들은 고유의 시험방법을 보유하고 있을 것이나 공개하지 않고 있는 실정이다. 한편 일부 해외 제조업체에서 국제 규격인 IEC 또는 JEDEC 을 기준으로 시험방법을 제시하고 있지만, 이러한 시험규격들은 개별 부품을 솔더링하는 하이브리드 공정을 이용하여 제작된 VCO 를 대상으로 한 것이다. 그러므로 CMOS 반도체 공정을 이용한 IC 형으로 개발 중인 VCO 를 평가하기에는 적합하지 않다. 이에 본 연구에서는 신개발 부품인 CMOS RF VCO IC 에 대한 신뢰성 시험 및 평가 기준을 수립하고, 신뢰성 확보를 위한 신제품 개발 단계에서의 신뢰성 평가 프로세스를 개발하고자 한다.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.94-100
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• 2014

In this paper, a design of low power Current-Reuse Voltage Controlled Oscillator (VCO) which has wide tuning range about 1.95 GHz ~ 3.15 GHz is presented. Class-C type is applied to improve phase noise and 2-Step Auto Amplitude Calibration (AAC) is used for minimizing the imbalance of differential VCO output voltage which is main issue of Current-Reuse VCO. The mismatch of differential VCO output voltage is presented about 1.5mV ~ 4.5mV. This mismatch is within 0.6 % compared with VCO output voltage. Proposed Current-Reuse VCO is designed using CMOS $0.13{\mu}m$ process. Supply voltage is 1.2 V and current consumption is 2.6 mA at center frequency. The phase noise is -116.267 dBc/Hz at 2.3GHz VCO frequency at 1MHz offset. The layout size is $720{\times}580{\mu}m^2$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.10A
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• pp.971-978
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• 2005

In this paper, we design and fabricate a VCO(Voltage Controlled Oscillator) for radar detector of X/K/Ka band using frequency multiplier. The existing VCO operated in radar detector have many Problems such as narrow bandwidth, slow frequency variable rate, unstable of production due to high frequency. So we design and fabricate a VCO improved such problems using frequency multiplier. As a result of measure, investigated frequency multiple VCO show its output power 3.64 dBm at multiplied operating frequency 11.27 GHz and have wide frequency tuning range of 660 MHz by controlled voltage 0V to 4.50 V applied diode. And also its phase noise is -104.0 dEc at 1 MHz offset frequency so we obtain suitable performance for commercial use.

• Journal of IKEEE
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• v.26 no.4
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• pp.714-721
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• 2022

A phase-locked loop (PLL)-based frequency synthesizer is proposed for a system on a chip (SoC) using multi-frequency clock signals. The proposed PLL-based frequency synthesizer consists of a charge pump PLL which is implemented by a phase frequency detector (PFD), a charge pump (CP), a loop filter, a voltage controlled oscillator (VCO), and a frequency divider, and an edge combiner. The PLL outputs a 12-phase clock by a VCO using six differential delay cells. The edge combiner synthesizes the frequency of the output clock through edge combining and frequency division of the 12-phase output clock of the PLL. The proposed PLL-based frequency synthesizer is designed using a 55-nm CMOS process with a 1.2-V supply voltage. It outputs three clocks with frequencies of 166 MHz, 83 MHz and 124.5MHz for a reference clock with a frequency of 20.75 MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.1
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• pp.103-109
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• 2004

In this paper, a new modeling methodology of thin film bulk acoustic resonator(TFBAR) is presented and the formulations of each lumped element in the model are also introduced. The new model is based upon the Mason model that is a reasonable model to explain the physical characteristics of unit TFBAR. After simplifying the modified Mason model with an additional dielectric loss term, the new model similar to Modified Butterworth-Van Dyke(MBVD) model is complete. The proposed model has three optimization variables which is half of the MBVD model. As a result, the curve fittings for the measured data are much faster and more accurate than any other conventional models. Moreover, it is very useful to design the bandpass filters or voltage controlled oscillators due to the design parameters, such as resonant and anti-resonant frequency, which can reflect the intentions of designer in the model.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.141-146
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• 2016

This paper presents a method to improve time interval error for asynchronous communication systems. The proposed method is designed and simulated with multi-phase VCO, interpolator, phase selector, up-down counter, comparator and adder. The simulation results for CAN communication system show that the maximum time interval error can be tightly managed for satisfying the required specification. The proposed frequency modulation method can be properly used for asynchronous communication systems requiring high reliability.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.5 s.120
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• pp.511-521
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• 2007

In this paper, we designed and fabricated a Ka-band synthesizer module. In addition, the systematic layout procedure and the test procedure were presented for the construction of compact synthesizer. To implement the Ka-band synthesizer, X-band VCO is employed as VCO and its frequency was multiplied by 3 with frequency tripler. The fabricated frequency synthesizer shows a frequency tuning range of 500 MHz, output power of about 14 dBm, and a phase noise of -96.17 dBc/Hz at the 100 kHz offset frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.5
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• pp.1304-1316
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• 1996

In this paper, A VCO(Voltage Controlled Oscillator) in use of clock recovery/data regeneration circuit for 10 Gbps fiber optic receivers was developed. The improved hair-pin resonator with a parallel coupled lines, which has been applied to microstrip filters, was used as a resonance part. As a frequcncy tuning device by substituting 3-terminalMESFET vaaractor for varactor diode, an MMIC manufacturing process will be simplified. Since a hair-pin resonator is planar type compared to the dielectric resonator and has a relatively flat reactance verus frequency, it will be favorable to apply a hair-pin resonator to an MMIC, in addition wideband frequency tuning range is able to be obtained.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.697-700
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• 1999

This Paper presents the design, fabrication, analysis of the measured date of a voltage controlled oscillator(VCO) for the application of Personal Communication Systems. Main VCO circuit consists of self biased emitter resonating circuit with microstrip line resonator on FR4 epoxy substrate. A varactor diode is used for 90MHz frequency tuning with center frequency of 1635MHz Phase noise of -114.67㏈C/Hz at 100KHz off set has been achieved with 3.3 V supply. The size of the fabricated VCO circuit is 1.25 cm$\times$ 1.25 cm.