• Transactions of the Korean Society of Mechanical Engineers
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• v.13 no.6
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• pp.1156-1169
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• 1989

본 연구에서는 용접도중 발생할 수 있는 용접질 저항요인을 전극분리현상을 측정하여 파악하고 용접 열입력에 해당하는 용접전류를 학습제어방식(self-learning control)에 의하여 컴퓨터와 주변기기(interface)를 통해 조절함으로서 요구되는 균일한 용접질이 항상 보장되도록 하였다. 여기서 학습제어방식을 태택한 이유는 제어하고자 하는 대상의 동적 모델(dynamic model)이 없어도 제어기 이득의 선정이 비교적 자유롭고 용접 제어장치가 자체적으로 감지(monitoring)한 신호로 판단하여 제어동작을 취함으로서 용접시 축적되는 정보(data)가 용접기에 일종의 지능을 부여할 수 있어서 진보된 개념의 용접제어장치 개발의 가능성을 검토해 보기 위함이다.

• Journal of Applied Reliability
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• v.17 no.1
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• pp.22-27
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• 2017

Purpose: The purpose of this study is to estimate the life time of OLED TV panel through electric current ADT(Accelerated Degradation Test). Methods: We performed accelerated degradation test for OLED TV Panel at the room temperature to avoid high temperature impact on the luminance. Results: we got more accurately the life time of the OLED TV when we applied ADT without temperature factor than including both current and temperature. Conclusion: Until now, the ADT of the OLED TV has been conducted with temperature and current at the same time for reducing test time and costs. We estimate incorrect life time when the temperature is adopted as an accelerated factor. Due to the high temperature impact on the luminance of the OLED TV panel. So as to solve this problem, we discard temperature and use electric current only.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.1
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• pp.15-21
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• 1983

In this paper, the theoretical analysis of lateral guiding mechanism in stripe geometry Double Heterojunction Laser Diode is performed. In the analysis, the spatial variations of gain form refractive index profile are modeled by the mathematical form of injected current density and the beam width variations dependence of active layer, stripe width & cavity length have been analyzed by perturbed mode equation.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.126-131
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• 2015

The accuracy of motor parameter measurement is necessary to improve the performance of vector control of an induction motor. The rotor time constant affects the performance of controller and also the resistance and leakage inductance of stator are very important design parameters of current and speed controller. In this paper a new modified motor parameter measurement methods for high performance speed control of vector control of an induction motor are proposed.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1004-1005
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• 2015

본 논문에서는 고정주파수에서 제어되고, LCL 공진성분을 가지는 풀-브리지 형태의 dc-dc 컨버터에 대해서 논의하였다. 제안된 컨버터는 부하에 관계없이 컨버터 이득이 동일한 출력값을 가지는 주파수를 가지는 지점에서 동작하게 된다. 특히, 컨버터에서 부하변동에 대한 특성은 부하에 따른 컨버터의 스위치 전류에 대한 특성을 확인하기 위해서 공진탱크에 대한 입력 임피던스와 출력 임피던스를 크기와 위상을 부하변동에 따른 주파수 특성을 분석하였다. 이와 같이 제안된 컨버터에 대한 특성을 확인하기 위해서 요구사항에 적절한 성분을 선정하여 컨버터를 설계 및 제작하였다. 실험결과는 부하변동에 따른 컨버터의 특성을 검증하기 위해서 수행되었다.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.375-377
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• 2006

본 논문에서는 LLC 공진형 컨버터의 최적 설계를 위해, ZVS 영역에서 동작하는 LLC 공진형 컨버터의 최악의 상태에 대한 정상 상태 해석을 하였다. LLC 공진형 컨버터의 최악의 상태는 최소 입력 전압, 최대 부하 전류일 때 얻을 수 있는 최대 전압 이득을 의미한다. 설계 변수는 스위칭 주파수 범위와 공진 인덕터 비율로서, 각 설계 변수의 변화에 따른 공진 탱크 설계 값, 최악의 상태 출력 전압 그리고 최대 공진 캐패시터 전압을 보여주는 '최악의 조건 설계 표'를 나타내었으며, 설계된 특정 공진 탱크 값에 대한 시뮬레이션 결과와 실험 결과를 보였다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.7
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• pp.1254-1259
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• 2008

A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.4
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• pp.1121-1133
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• 1998

In this paper, a new method is proposed for a simple andaccurate design of larage-sigal power amplifier using the output current- and volage- waveform analysis. An existing high-efficiency theory, Harmonic Loading, is modified to apply to a real device, and the notion of "actual bias point at large-signal input" is proposed. Based on the proposed theory, 2GHz band poweramplifier is implemented using HEMT device, and the implemented amplifier shows 14dBm output power, 46% drain efficienty, 38% power-added efficiency and 7.8dB gain at 2V bias voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.10-12
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• 1996

AlGaAs/GaAs Heterojunotion Bipolar Transistors (HBTs) with various emitter areas were fabricated and the device size dependence on the current gain was examined. With the different emitter areas, the passivated devices having the same peripheral length were fabricated and measured. The measured base current density in the Gummel plots shows an ideality factor of nearly 2. It is found that as the emitter area becomes small, the base current density with the ideality factor of 2 increases linearly, and as the emitter perimeter/area ratio becomes large, the surface recombination current density component increases. The current gain performance in AlGaAs/GaAs HBTs is mainly determined by either the larger emitter area or the smaller ratio of the emitter perimeter to the emitter area. These results will be compared with experimental works for GaInP/GaAs HBTs

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.2
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• pp.116-119
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• 2000

A hybrid SOI bipolar-mode field effect transistor (BMFET) is proposed to improve the current gain. The device characteristics are analyzed and verified numerically for BMFET mode, DMOS mode, and hybrid mode by MEDICI simulation. The proposed SOI BMFET exhibits 30 times larger current gain in hybrid-mode operation by connecting DMOS gate to the p+ gate of BMFET structure as compared with the conventional structure without sacrifice of breakdown voltage and leakage current characteristics. This is due to the DMOS-gate-induced hybrid effect that lowers the barrier of p-body and reduces the charge in p-body.