• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.3
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• pp.527-536
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• 2000

This paper discusses the design of self-oscillating mixer type low noise down converter using the microwave field effect transistor. The mixer is consists of local oscillator in which high stability dielectric resonator and band pass filter to get rid of spurious oscillation at intermediate frequency stage. The microstrip antenna was integrated in the same substrate which generate 12.3GHz and low noise amplifier was also added after antenna using 3 stage of high electron mobility transistors. The output frequency from the local oscillator was chosen as 11.3GHz for the Ku-band application. The measured phase noise was -804dBc/Hz at 100kHz offset frequency, and the gain was 7～12dB in frequency range from 12.0GHz to 12.7GHz. The noise figure at intermediate frequency stage was 64H. The designed model shows less conversion loss than previous diode type mixer. The proposed mixer can be used in digital satellite broadcasting and communication system and expected to use in next generation low noise block design.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.6
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• pp.46-53
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• 1998

A new method to form the double structured active layers of a-Si/a-SiN$_{x}$ of polycrystalline thin film transistor is proposed and poly-Si TFTs employed double structure active film are fabricated. Nitrogen ions were added to bottom amorphous silicon active film(a-SiN$_{x}$ ) and pure a-Si film deposition on a-SiN$_{x}$ was followed. The XeCl excimer laser was irradiated to crystallize double structure active film. The grain growth of upper a-Si film was also promoted in the double structured active layers of a-Si/a-SiN$_{x}$ due to the mitigation of solidification process of lower a-SiN$_{x}$ layer. Our experimental results show that the ratio of NH$_3$/SiH$_4$ is required to maintain below 0.11 for the reduction of contact resistance of n$^{+}$ poly-SiN$_{x}$ layer.r.

• Journal of Sensor Science and Technology
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• v.2 no.1
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• pp.95-99
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• 1993

a-Si : H TFTs for image sensor have been fabricated and their operational characteristics have been investigated. Hydrogenated amorphous silicon nitride(a-SiN : H) films were used for the gate insulator and $n^{+}$-a-Si : H films were depostied for the source and drain contact. The thicknesses of a-SiN : H and a-Si : H films were $2000{\AA}$, respectively and the thickness of $n^{+}$-a-Si : H film was $500{\AA}$. Also the channel length and channel width of a-Si : H TFTs were $50{\mu}m$ and $1000{\mu}m$, respectively. The ON/OFF current ratio, threshold voltage, and field effect mobility of fabricated a-Si : H TFTs were $10^{5}$, 6.3 V, and $0.15cm^{2}/V{\cdot}s$, respectively.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.8
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• pp.1227-1234
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• 2013

An analog array with a 1.2 double poly floating gate transistor has been developed with a standard CMOS fabrication process. The programming of each cell by means of an efficient control circuit eliminates the unnecessary erasing operation which has been widely used in conventional analog memories. It is seen that the path of the signal for both the programming and the reading is almost exactly the same since just one comparator supports both operations. It helps to eliminate the effects of the amplifier input-offset voltage problem on the output voltage for the read operation. In the array, there is no pass transistor isolating a cell of interest from the adjacent cells in the array. Instead of the extra transistors, one extra bias voltage, Vmid, is employed. The experimental results from the memory shows that the resolution of the memory is equivalent to the information content of at least six digital cells. Programming/erasing of each cell is achieved with no detectable disturbance of adjacent cells. Finally, the unique shape of the injector structure in a EEPROM is adopted as a cell of analog array. It reduces the programming voltage below the transistor breakdown voltage without any special fabrication process.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.60.2-60.2
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• 2012

기술의 발전이 비약적으로 성장하면서, 소비자의 요구는 빠르게 변하고 있다. 전자 소자를 응용한 제품 시장은 매해를 거듭할 수록 빠른 속도로 성능을 향상시키고 있다. 이에 따라 디스플레이 시장에서 가장 큰 관심은 작은 화면에서도 높은 해상도를 요구하고, 수광형의 구동방식이 아닌 능동형 구동방식을 갖는 AMOLED (Active Matrix Organic Light Emitted Diode)를 선호하고 있으며, 빠른 응답속도 기반을 갖는 표시소자를 요구하고 있다. 제품 생산자들의 고민은 기존의 비정질 실리콘 기반의 LCD (Liquid crystal display) 구동소자와 공정을 이용하여 소비자의 욕구에 접근하기가 점점 어려워지고 있다. 최근 이러한 문제점을 해결하고자 하는 노력들중에서 산화물 반도체 재료와 이를 이용한 박막 트랜지스터 개발이 큰 관심을 갖고 있다. 최근 InGaZnO 산화물 반도체 재료는 기존의 비정질 실리콘 반도체 재료 보다 높은 전계 이동도(> $10cm^2/V.s$)를 보이고 있으며, 비정질 실리콘 박막 트랜지스터의 구조에서 산화물 반도체 재료의 대체만으로 효과가 보일 수 있어서 큰 연구가 진행되어져 왔다. 하지만, InGaZnO 산화물 박막 트랜지스터에 대한 소자를 AMOLED에 적용할 때, 기존의 LTPS (low temperature poly-slicon)에서는 발견되지 않았던 소자의 전계신뢰성과 이동도 한계가 문제로 제기되었다. 또한, Indium이라는 희소원소의 사용은 향후 공정 단가와 희소 물질에 대한 위협등에 의하여 새로운 산화물 반도체 재료에 대한 요구와 관심이 발생하고 있다. 본 발표에서는 기존의 산화물 반도체 재료에 대한 차세대 디스플레이인 AMOLED와 유연 디스플레이에 대한 응용 가능성을 발표할 예정이다. 또한 산화물 반도체 재료의 신뢰성 문제에 대한 해결방법으로 신규 산화물 반도체 재료에 대한 연구 방향과 indium-free 계열을 이용한 저원가 산화물 반도체 연구에 대하여 소개할 예정이다. 앞으로 산화물 반도체 재료에 대한 연구와 응용은 기존의 실리콘 반도체 틀을 벗어난 새로운 응용분야를 열어줄 수 있을 것으로 기대하고 있으며, 그 기대에 대한 몇가지 예를 통하여 재료와 소자의 응용 가능성을 논의할 예정이다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.2
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• pp.71-82
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• 1984

A programme, called BIPOLE, for the numerical analysis of twotimensional n-p-n bipolar transistors was developed. It has included the SRH and Auger recolnbination processes, the mobility dependence on the impurity density and the electric field, and the band-gap narrowing effect. The finite difference equations of the fundamental semiconductor equations are formulated using Newton's method for Poisson's equation and the divergence theorem for the hole and electron continuity equations without physical restrictions. The matrix of the linearized equations is sparse, symmetric M-matrix. For the solution of the linearized equations ICCG method and Gummel's algorithm have been employed. The programme BIPOLE has been applied to various kinds of the steady-state problems of n-p-n transistors. For the examples of applications the variations of common emitter current gain, emitter and diffusion capacitances, and input and output characteristics are calculated. Three-dimensional representations of some D.C. physical quantities such as potential and charge carrier distributions were displayed. This programme will be used for the nome,rical analysis of the distortion phenom ana of two-dimensional n-p-n transistors. The BIPOLE programme is available for everyone.

• Korean Chemical Engineering Research
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• v.60 no.2
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• pp.313-319
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• 2022

AlGaN/GaN based HfO₂ MOSHEMT (metal oxide semiconductor high electron transistor) with different gate recess depth was simulate to demonstrate a successful normally-off operation of the transistor. Three types of the HEMT structures including a conventional HEMT, a gate-recessed HEMT with 3 nm thick AlGaN layer, and MIS-HEMT without AlGaN layer in the gate region. The conventional HEMT showed a normally-on characteristics with a drain current of 0.35 A at V_G = 0 V and V_DS = 15 V. The recessed HEMT with 3 nm AlGaN layer exhibited a decreased drain current of 0.15 A under the same bias condition due to the decrease of electron concentration in 2DEG (2-dimensional electron gas) channel. For the last HEMT structure, distinctive normally- off behavior of the transistor was observed, and the turn-on voltage was shifted to 0 V.

• Journal of Adhesion and Interface
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• v.24 no.2
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• pp.64-68
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• 2023

Organic field-effect transistors (OFETs) are attracting attention in the field of next-generation electronic devices, and they can be fabricated on a flexible substrate using an organic semiconductor as a channel layer. In particular, DPP-based semiconducting conjugated polymers are actively used because they have higher charge carrier mobility than other organic semiconductors, but they are still lower than inorganic semiconductors, so various studies are being conducted to improve the charge carrier mobility. In this study, the charge carrier mobility is improved by controlling the surface energy of the substrate by forming self-assembled monolayers (SAMs). As the surface energy of the substrate is controlled by the SAMs, the crystallinity increases, thereby improving the charge carrier mobility by 14 times from 3.57×10^-3 cm²V^-1s^-1 to 5.12×10^-2 cm²V^-1s^-1

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.379.1-379.1
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• 2014

그래핀은 뛰어난 기계적, 화학적, 광학적, 전기적 특성을 가지고 있는 2차원 물질로써, 화학기상증착법을 이용한 대면적 합성법과 전사 공정을 통해 다양한 기판에서 사용이 가능해지면서 차세대 전자소재로 활용하기 위한 활발한 연구가 이루어지고 있다. 상온 대기에서 간편하게 적용 가능한 고분자용액공정을 도입하여, 그래핀과 폴리에틸렌이민(polyethyleneimine)의 다양한 적층구조를 제작하였다. 폴리에틸렌이민의 높은 밀도의 극성 기능기와 그래핀의 가스배리어 특성을 이용한 상호 보완적인 구조를 형성하여 외부 환경에 장시간 안정적이고 효과적인 n형 도핑 효과를 유지하였다. 그래핀에 결함 형성없이 도핑 농도 조절이 가능하며, 그래핀 고유의 선형적인 상태밀도를 이용한 일함수 조절효과를 확인하였다. 그래핀 p-n 접합 소자를 제작을 통해 베젤라고 렌즈 효과, 반정수 양자 홀 효과를 이용한 기초 연구에 접근이 가능할 것으로 보이며, 응용 분야에서는 태양광전지, 유기 전자 소자 분야 등 그래핀을 이용한 전기적 접촉 개선에 활용될 수 있을 것으로 보인다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.1
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• pp.127-132
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• 2012

In this paper, the edge effects of proposed structure in active region for high voltage in shallow trench isolation for very large integrated MOSFET were simulated. Shallow trench isolation (STI) is a key process component in CMOS technologies because it provides electrical isolation between transistors and transistors. As a simulation results, shallow trench structure were intended to be electric functions of passive, as device dimensions shrink, the electrical characteristics influence of proposed STI structures on the transistor applications become stronger the potential difference electric field and saturation threshold voltage.