• Title/Summary/Keyword: 저전력알고리즘

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The Low Power Algorithm of ZigBee Router for Non Beacon Enabled PAN (Non Beacon Enabled PAN 환경에서 ZigBee Router의 저전력 알고리즘)

  • Yoon, Sung-Kun;Park, Su-Jin;Lee, Ho-Eung;Park, Hyun-Ju
    • 한국HCI학회:학술대회논문집
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    • 2008.02a
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    • pp.280-285
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    • 2008
  • ZigBee is Low Power and Low Data Rate Wireless Communication protocol. It apply to much Ubiquitous Sensor Network. ZigBee PAN is two type PAN. One is Beacon Enabled PAN, the other is Non Beacon Enabled PAN. To support Low Power in Non Beacon Enabled PAN, End-Device enter Active status at End-Device's wishing time and send a data. So, Router does not know End-Device sends a data time. To solving this problem, Router must always exist to Active status. In this case, Router receive a power supply always in Non Beacon Enabled PAN. But Router does not receive a power supply always, Router can not normal operation, such as Router use a battery. To solve this problem, Router will be support low power. In this paper, we will present Router's Low Power Algorithm. And we suggest 'PAN Time'. Device use 'PAN Time' for PAN synchronous. Router using Low Power Algorithm can be enter to inactive status. So Non Beacon Enabled PAN of Router support the low power mode Therefore Router does not receive a power supply always, Router can normal operation.

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Environment Adaptive WBAN Routing based on Residual energy (에너지량에 기반한 환경 적응 WBAN 라우팅 알고리즘)

  • Kim, Wee-Yeon;Kim, Dae-Young;Shin, Sang-Bae;Cho, Jin-Sung
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.1
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    • pp.89-99
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    • 2011
  • In this paper, we propose an routing algorithm for ultra low power and high reliable transmission in WBAN environment. This algorithm is to minimize energy consumption and to maximize the life and reliability for medical devices. Also, this algorithm is not only medical devices but also non-medical devices is to minimize energy consumption and to maximize the life of device. The combination of the distance from the previous node and residual energy calculates weight. The calculated weight is used to calculate the weight of full path by cumulative weights. The full path to the smallest of the weights are set to the path. Also this algorithm is able to select another path to avoid the error path by determining the link status between nodes, when occurs link error and congestion. In this paper, we show that WSN routing algorithm based on shortest hop count routing algorithm and EAR routing algorithm compared to ensure high reliability and low power characteristic of WBAN to be verified through simulations.

Off-line CORDIC Vector Rotation Algorithm for High-Performance and Low-Power 3D Geometry Operations (고성능/저전력 3D 기하 연산을 위한 오프라인 CORDIC 벡터회전 알고리즘)

  • Kim, Eun-Ok;Lee, Jeong-Gun;Lee, Jeong-A
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.8
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    • pp.763-767
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    • 2008
  • In this paper, to make a high performance and low power CORDIC architecture for 3D operations in mobile devices, we suggest two off-line vectoring algorithms named Angle Based Search (ABS) and Scaling Considered Search (SCS). The ABS algorithm represents a 3D vector with two angles and those angles are used as a condition for searching CORDIC rotation sequences. The SCS algorithm determines the best CORDIC rotation sequence in advance to eliminate extra scaling computation. Using the proposed algorithms, we can observe 50% of latency is reduced. Furthermore, we perform a simple analysis and discuss possible reduction of power consumption by applying voltage scaling method together with the proposed algorithm.

A Low Power and Area Efficient FIR filter for PRML Read Channels (저전력 및 효율적인 면적을 갖는 PRML Read Channel 용 FIR 필터)

  • 조병각;강진용;선우명훈
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.255-258
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    • 2000
  • 본 논문에서는 효율적인 면적의 저전력 FIR 필터를 제안한다. 제안된 필터는 6 비트 8 탭의 구조를 갖는PRML(Partial-Response Maximum Likelihood) 디스크드라이브 read channel용 FIR 필터이다 제안된 구조는 병렬연산 구조를 채택하고 있으며 네 단의 파이프라인 구조를 가지고 있다. 곱셈을 위하여 부스 알고리즘이 사용되며 압축기를 이용하여 덧셈을 수행한다. 저전력을 위해 CMOS 패스 트랜지스터를 사용하였으며 면적을 줄이기 위해 single-rail 로직을 사용하였다 제안된 구조를 0.65㎛ CMOS 공정을 이용하여 설계하였으며1.88 × 1.38㎟의 면적을 차지하였고 HSPICE 시뮬레이션 결과 3.3V의 공급전압에서 100㎒로 동작시 120㎽의 전력을 소모한다. 제안된 구조는 기존의 구조들에 비해 약 11%의 전력이 감소했으며 약 33%의 면적이 감소하였다.

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OFDM System for Wireless-PAN related short distance Maritime Data Communication (Wireless PAN기반의 근거리 해상통신용 OFDM 송수신회로에 관한 연구)

  • Cho, Seung-Il;Cha, Jae-Sang;Park, Gye-Kack;Yang, Chung-Mo;Kim, Seong-Kweon
    • Journal of the Korean Institute of Intelligent Systems
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    • v.19 no.1
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    • pp.145-151
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    • 2009
  • Orthogonal Frequency Division Multiplexing (OFDM) has been focused on as 4th generation communication method for realization of Ubiquitous Network in land mobile communications services, and has been a standard technology of Wireless Local Area Network (WLAN) for a High Date Rate communication. And in maritime data communication using high frequency (HF) band, 32-point FFT OFDM system is recommended by International Telecommunication Union (ITU). Maritime communication should be kept on connecting when maritime accident or the maritime disaster happen. Therefore, main device FFT should be operated with low power consumption. In this paper we propose a low power 32-point FFT algorithm using radix-2 and radix-4 for low power operation. The proposed algorithm was designed using VHSIC hardware description language (VHDL), and it was confirmed that the output value of Spartan-3 field-programmable gate array (FPGA) board corresponded to the output value calculated using Matlab. The proposed 32-point FFT algorithm will be useful as a leading technology in a HF maritime data communication.

Resynthesis of Logic Gates on Mapped Circuit for Low Power (저전력 기술 매핑을 위한 논리 게이트 재합성)

  • 김현상;조준동
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.11
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    • pp.1-10
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    • 1998
  • The advent of deep submicron technologies in the age of portable electronic systems creates a moving target for CAB algorithms, which now need to reduce power as well as delay and area in the existing design methodology. This paper presents a resynthesis algorithm for logic decomposition on mapped circuits. The existing algorithm uses a Huffman encoding, but does not consider glitches and effects on logic depth. The proposed algorithm is to generalize the Huffman encoding algorithm to minimize the switching activity of non-critical subcircuits and to preserve a given logic depth. We show how to obtain a transition-optimum binary tree decomposition for AND tree with zero gate delay. The algorithm is tested using SIS (logic synthesizer) and Level-Map (LUT-based FPGA lower power technology mapper) and shows 58%, 8% reductions on power consumptions, respectively.

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Low Power Real-Time Scheduling for Tasks with Nonpreemptive Sections (비선점 구간을 갖는 태스크들을 위한 저전력 실시간 스케줄링)

  • Kim, Nam-Jin;Kim, In-Guk
    • The Journal of the Korea Contents Association
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    • v.10 no.1
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    • pp.103-113
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    • 2010
  • The basic real-time scheduling algorithms based on RM or EDF approaches assume that the tasks are preemptive, but the tasks may contain nonpreemptive sections in many cases. Also the existing scheduling algorithm for reducing the power consumption of the processor is based on the task utilizations and determines the processor speed $S_H$ or $S_L$ according to the existence of the blocking intervals. In this algorithm, the $S_H$ interval that operates in high speed is the interval during which the priority inversion by blocking occurs, and the length of this interval is set to the task deadline that includes the blocking intervals. In this paper, we propose an improved algorithm that can reduce the power consumption ratio by shortening the length of the $S_H$ interval. The simulation shows that the power consumption ratio of the proposed algorithm is reduced as much as 13% compared to the existing one.

FSM state assignment for low power dissipation based on Markov chain model (Markov 확률 모델을 이용한 저전력 상태 할당 알고리즘)

  • Kim, Jong Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.51-51
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    • 2001
  • 본 논문은 디지털 순서회로 설계시 상태할당 알고리즘 개발에 관한 연구로, 동적 소비전력을 감소시키기 위하여 상태변수의 변화를 최소로 하는 코드를 할당하여 상태코드가 변화하는 스위칭횟수를 줄이도록 하였다. 상태를 할당하는데는 Markov의 확률함수를 이용하여 hamming거리가 최소가 되도록 상태 천이도에서 각 상태를 연결하는 edge에 weight를 정의한 다음, 가중치를 이용하여 각 상태들간의 연결성을 고려하여 인접한 상태들간에는 가능한 적은 비트 천이를 가지도륵 모든 상태를 반복적으로 찾아 계산하였다. 비트 천이의 정도를 나타내기 위하여 cost 함수로 계산한 결과 순서회로의 종류에 따라 Lakshmikant의 알고리즘보다 최고 57.42%를 감소시킬 수 있었다.

Low Power Contrast Enhancement for OLED Displays (OLED 디스플레이를 위한 저전력 대조비 향상 기법)

  • Kim, Jin-Hwan;Lee, Chul;Lee, Chul-Woo;Kim, Chang-Su
    • Journal of Broadcast Engineering
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    • v.17 no.2
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    • pp.284-294
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    • 2012
  • A low power contrast enhancement algorithm for OLED displays is proposed in this work. The proposed algorithm increases the contrast of the image based on a linear transformation function, while reducing the power consumption of OLED displays. Furthermore, the proposed algorithm extends the global contrast enhancement to local contrast enhancement using the block-based transformation function. Simulation results demonstrate that the proposed algorithm reduces the power consumption, while enhancing the contrast of an input image.

Single hop Wireless Sensor Network for Low Power Configuration (Single hop Wireless Sensor Network의 저전력 구성)

  • Kim, Min-Chul;Lee, Chang-Won;Park, Chong-Ryol;Jung, Kyung-Kwon;Eom, Ki-Hwan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.731-734
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    • 2011
  • This paper proposed the Low power configuration of Single hop WSN(Wireless Sensor Network) system. When the RF communication is done each tag node during the WSN systems operating, power consumption is greatest. There for, if you configure the Network with the RF communication module turn on/off periodically, power consumption less then operating the module all the time without it toggles. However, some data omissions may occur in which transmission and receipt is done. So this paper proposed the algorithm for low power system without data omissions.

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