• Title/Summary/Keyword: 저밀도 패리티 검사 코드

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Quasi-Cyclic Low-Density Parity-Check Codes with Large Girth Based on Euclidean Geometries (유클리드 기하학 기반의 넓은 둘레를 가지는 준순환 저밀도 패리티검사 코드)

  • Lee, Mi-Sung;Jiang, Xueqin;Lee, Moon-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.11
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    • pp.36-42
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    • 2010
  • This paper presents a hybrid approach to the construction of quasi-cyclic (QC) low-density parity-check (LDPC) codes based on parallel bundles in Euclidean geometries and circulant permutation matrices. Codes constructed by this method are shown to be regular with large girth and low density. Simulation results show that these codes perform very well with iterative decoding and achieve reasonably large coding gains over uncoded system.

Telemetry Standard 106-17 LDPC Decoder Design Using HLS (HLS를 이용한 텔레메트리 표준 106-17 LDPC 복호기 설계)

  • Gu, Young Mo;Kim, Seongjong;Kim, Bokki
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.49 no.4
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    • pp.335-342
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    • 2021
  • By using HLS when developing a communication system FPGA, HDL code can be automatically generated from a little modified C/C++ source code used for performance verification, which has the advantage of shortening the development period. In this paper, a method of designing a telemetry standard 106-17 LDPC decoder in C language is proposed using Xilinx's Vivado HLS, and by synthesizing Spartan-7 and Kintex-7 as target devices, throughput and FPGA utilization rate was compared.

Telemetry Standard 106-17 LDPC Encoder Design Using HLS (HLS를 이용한 텔레메트리 표준 106-17 LDPC 부호기 설계)

  • Gu, Young Mo;Lee, Woonmoon;Kim, Bokki
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.48 no.10
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    • pp.831-835
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    • 2020
  • By automatically generating HDL codes from C/C++ source codes, HLS makes it possible to shorten FPGA system developing period through easy timing control and structure change. We designed LDPC encoder for telemetry standard 106-17 with Xilinx Vivado HLS and showed hardware structure can be easily adapted for different purposes through minor C code modification. Synthesis results targeting Spartan-7 xc7s100 device are presented for throughput and hardware complexity comparison.

Bit Split Method for Efficient Channel Estimation in UWA Channel (수중 다중경로 채널에서 효과적인 채널추정을 위한 비트 분리 방법)

  • Kim, Min-Hyuk;Park, Tae-Doo;Kim, Chul-Seung;Jung, Ji-Won;Yong, Chun-Seung;Sohn, Kwon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.10
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    • pp.2207-2214
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    • 2010
  • Underwater acoustic(UWA) communication has multipath error because of reflection by sea-level and sea-bottom. The multipath of UWA channel causes signal distortion and error floor. In this paper, we proposed split input bits of channel decoder using method of maximum value, average value, LLR value for optimal estimation. Channel coding method is LDPC(N size=16000) standard in DVB-S2. As shown in simulation results, the performance of LLR value method is better than other methods.