• Title/Summary/Keyword: 잡음증폭

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Measuring Circuit Design of RI-Gauge for Compaction Control (성토시공관리용 방사성 동위원소 이용계기의 측정회로설계)

  • Kil, Gyung-Suk;Song, Jae-Yong;Kim, Ki-Joon;Whang, Joo-Ho;Song, Jung-Ho
    • Journal of Sensor Science and Technology
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    • v.6 no.5
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    • pp.385-391
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    • 1997
  • An objection of this study is to develop a measuring circuit of a gauge using radioisotope for compaction control. The gauge developed in this study makes use of radioisotope with the activity exempted from domestic atomic law and consists of measuring circuits for gamma-rays and thermal neutrons, a high voltage supply unit, and a microprocessor. To obtain meaningful numbers of pulse counts, parallel five and two circuits are provided for gamma-rays and thermal neutrons, respectively. Being simple in electrical characteristics of G-M detector for gamma-rays, pulses are counted through only a shaping circuit. Very small pulses generated from He- 3 proportional detector for thermal neutrons are amplified to the maximum of 50 [dB] and a window comparator accepts only pulses with meaning. To minimize effects of natural environmental radiation and electrical noise, circuits are electrostatically shielded and pulses made by ripples are eliminated by taking frequency of high voltage supplied to the circuit and pulse height of ripples into consideration. One-chip microprocessor is applied to process various counts, results are stored and the gauage is made capable to communicate with PC. Enough and meaningful numbers of pulses are counted with the prototype gauage for compaction control.

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Detection Scheme Based on Gauss - Seidel Method for OTFS Systems (OTFS 시스템을 위한 Gauss - Seidel 방법 기반의 검출 기법)

  • Cha, Eunyoung;Kim, Hyeongseok;Ahn, Haesung;Kwon, Seol;Kim, Jeongchang
    • Journal of Broadcast Engineering
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    • v.27 no.2
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    • pp.244-247
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    • 2022
  • In this paper, the performance of the decoding schemes using linear MMSE filters in the frequency and time domains and the reinforcement Gauss-Seidel algorithm for the orthogonal time frequency space (OTFS) system that can improve robustness under high-speed mobile environments are compared. The reinforcement Gauss-Seidel algorithm can improve the bit error rate performance by suppressing the noise enhancement. The simulation results show that the performance of the decoding scheme using the linear MMSE filter in the frequency domain is severely degraded due to the effect of Doppler shift as the mobile speed increases. In addition, the decoding scheme using the reinforcement Gauss-Seidel algorithm under the channel environment with 120 km/h and 500 km/h speeds outperforms the decoding schemes using linear MMSE filters in the frequency and time domains.

A 10b 50MS/s Low-Power Skinny-Type 0.13um CMOS ADC for CIS Applications (CIS 응용을 위해 제한된 폭을 가지는 10비트 50MS/s 저 전력 0.13um CMOS ADC)

  • Song, Jung-Eun;Hwang, Dong-Hyun;Hwang, Won-Seok;Kim, Kwang-Soo;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.5
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    • pp.25-33
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    • 2011
  • This work proposes a skinny-type 10b 50MS/s 0.13um CMOS three-step pipeline ADC for CIS applications. Analog circuits for CIS applications commonly employ a high supply voltage to acquire a sufficiently acceptable dynamic range, while digital circuits use a low supply voltage to minimize power consumption. The proposed ADC converts analog signals in a wide-swing range to low voltage-based digital data using both of the two supply voltages. An op-amp sharing technique employed in residue amplifiers properly controls currents depending on the amplification mode of each pipeline stage, optimizes the performance of op-amps, and improves the power efficiency. In three FLASH ADCs, the number of input stages are reduced in half by the interpolation technique while each comparator consists of only a latch with low kick-back noise based on pull-down switches to separate the input nodes and output nodes. Reference circuits achieve a required settling time only with on-chip low-power drivers and digital correction logic has two kinds of level shifter depending on signal-voltage levels to be processed. The prototype ADC in a 0.13um CMOS to support 0.35um thick-gate-oxide transistors demonstrates the measured DNL and INL within 0.42LSB and 1.19LSB, respectively. The ADC shows a maximum SNDR of 55.4dB and a maximum SFDR of 68.7dB at 50MS/s, respectively. The ADC with an active die area of 0.53$mm^2$ consumes 15.6mW at 50MS/s with an analog voltage of 2.0V and two digital voltages of 2.8V ($=D_H$) and 1.2V ($=D_L$).

A study on optical coherence tomography system using optical fiber (광섬유를 이용한 광영상 단층촬영기에 관한연구)

  • 양승국;박양하;장원석;오상기;김현덕;김기문
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2004.04a
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    • pp.5-9
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    • 2004
  • In this paper, we studied the OCT(Optical Coherence Tomography) system which it has been extensively studied because of having some advantages such as high resolution cross-sectional images, low cost, and small size configuration. A basic principle of OCT system is Michelson interferometer. The characteristics of light source determine the resolution and the transmission depth. As a results, the light source have a commercial SLD with a central wavelength of 1,285 nm and FWHM(Full Width at Half Maximum) of 35.3 nm. The optical delay line part is necessary to equal of the optical path length with scattered light or reflected light from sample. In order to equal the optical path length, the stage which is attached to reference mirror is moved linearly by step motor And the interferometer is configured with the Michelson interferometer using single mod fiber, the scanner can be focused of the sample by using the reference arm. Also, the 2-dimensional cross-sectional images were measured with scanning the transverse direction of the sample by using step motor. After detecting the internal signal of lateral direction at a paint of sample, scanner is moved to obtain the cross-sectional image of 2-demensional by using step motor. Photodiode has been used which has high detection sensitivity, excellent noise characteristic, and dynamic range from 800 nm to 1,700 nm. It is detected mixed small signal between noise and interference signal with high frequency After filtering and amplifying this signal, only envelope curve of interference signal is detected. And then, cross-sectional image is shown through converting this signal into digitalized signal using A/D converter. The resolution of the OCT system is about 30$\mu\textrm{m}$ which corresponds to the theoretical resolution. Also, the cross-sectional image of ping-pong ball is measured. The OCT system is configured with Michelson interferometer which has a low contrast because of reducing the power of feedback interference light. Such a problem is overcomed by using the improved inteferometer. Also, in order to obtain the cross-sectional image within a short time, it is necessary to reduce the measurement time for improving the optical delay line.

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A Study for Design and Performance Improvement of the High-Sensitivity Receiver Architecture based on Global Navigation Satellite System (GNSS 기반의 고감도 수신기 아키텍처 설계 및 성능 향상에 관한 연구)

  • Park, Chi-Ho;Oh, Young-Hwan
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.4
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    • pp.9-21
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    • 2008
  • In this paper, we propose a GNSS-based RF receiver, A high precision localization architecture, and a high sensitivity localization architecture in order to solve the satellite navigation system's problem mentioned above. The GNSS-based RF receiver model should have the structure to simultaneously receive both the conventional GPS and navigation information data of future-usable Galileo. As a result, it is constructed as the multi-band which can receive at the same time Ll band (1575.42MHz) of GPS and El band (1575.42MHz), E5A band (1207.1MHz), and E4B band (1176.45MHz) of Galileo This high precision localization architecture proposes a delay lock loop with the structure of Early_early code, Early_late code, Prompt code, Late_early code, and Late_late code other than Early code, Prompt code, and Late code which a previous delay lock loop structure has. As we suggest the delay lock loop structure of 1/4chips spacing, we successfully deal with the synchronization problem with the C/A code derived from inaccuracy of the signal received from the satellite navigation system. The synchronization problem with the C/A code causes an acquisition delay time problem of the vehicle navigation system and leads to performance reduction of the receiver. In addition, as this high sensitivity localization architecture is designed as an asymmetry structure using 20 correlators, maximizes reception amplification factor, and minimizes noise, it improves a reception rate. Satellite navigation system repeatedly transmits the same C/A code 20 times. Consequently, we propose a structure which can use all of the same C/A code. Since this has an adaptive structure and can limit(offer) the number of the correlator according to the nearby environment, it can reduce unnecessary delay time of the system. With the use of this structure, we can lower the acquisition delay time and guarantee the continuity of tracking.