• Title/Summary/Keyword: 입.출력 특성

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Analysis of Flow Field Characteristics Inside a Shroud for Rotor Positions (로터 위치에 따른 쉬라우드 내부 유동장 특성 분석)

  • Bak, Da In;Han, Seok Jong;Lee, Uk Jae;Lee, Sang Ho;Choi, Hyuk Jin;Im, Jong Seok
    • Journal of Korean Society of Coastal and Ocean Engineers
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    • v.32 no.1
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    • pp.48-54
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    • 2020
  • Numerical analysis was carried out to analyze the flow fields and mechanical output of a rotor for various positions and inlet flow rates in a shroud, and it was compared with experimental data. Rotor and seawater current largely affects the flow field characteristics in the shroud system. Especially the mechanical output of the rotor increased with axial position near the center of the cylinder, and it gradually decreased close to the entrance and exit. Also, the rotor output increased with the inlet velocity. Axial and angular momentum of flow along the cylinder region rapidly increased and reached a peak, and then decreased as it passed through the rotor, while there was no significant change in the cylinder region. It is expected that these results can be used as applicable design data for the development of the tidal power generation system.

Design of Three-stage Low-noise Amplifier for K-band Satellite Communication (K-대역 위성통신용 3단 저잡음 증폭기의 설계)

  • 이승욱;이영철;김영진
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.10a
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    • pp.196-199
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    • 2000
  • In this paper, we have designed a low-noise amplifier for the down-converter to apply the K-band Mu-kung-hwa satellite downconvertion. We have designed on three-stage to satisfy the property of low-noise amplifier for the down-converter required at least 30dB gain. The simulaition results for the designed three-stage Low-noise amplifier are measured that 33dB, gain and 0.93dB, noise-figure From 19.200 to 20.200, and The experiment results of the fabric are measured that 25dB, gain and 1.5dB, noise-figure. Since Input reflection coefficient and otput resection coefficient are -25dB and -28dB, respectively, and VSWR is lower than 1.5, this amplifier can be used as a low-noise amplifier for the down-converter to apply the K-band Mu-kung-hwa satellite downconvertion.

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A Band Pass Filter with Feeding Structure Using π-Type Transmission Line (π-형 전송선 급전 구조를 갖는 대역 통과 필터)

  • Bae, Ju-Seok;Lim, Jong-Sik;Kim, Kwi-Soo;Ahn, Dal
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.2
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    • pp.114-120
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    • 2008
  • This paper proposed the band pass filter(BPF) with feeding structure using $\pi$-type transmission line by means of transforming the input/output coupled-lines of the half wavelength parallel coupled-line BPF into K-inverter, then substituting $\pi$-type transmission line equivalence for K-inverter. The proposed method supplies solution with what the half wavelength parallel coupled-line BPF's input/output coupled-lines are realized. Also it can quite reduce efforts and time needed to optimize filter performance when is compared to reported method using tapped line structure because formulas is very simple and accurate. On the basic of the proposed method, the BPF with feeding structure using $\pi$-type transmission line has been designed and fabricated. The validity of proposed method was proven by the measured result.

Analysis of Effect of Capacitor Voltage Fluctuation Suppression Controller on Natural Arm Capacitor Voltage Balancing of a Direct Modulated MMC (직접 변조 방식 MMC의 전압 맥동 제어기가 암 캐패시터 전압 자연 밸런싱에 미치는 영향 분석)

  • Jung, Jae-Jung;Sul, Seung-Ki
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.385-386
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    • 2016
  • 직접 변조 방식(direct modulation)을 사용한 Modular Multilevel Converter(MMC)의 6개의 암 캐패시터 전압의 자연균형화(Natural Balancing) 현상은 여러 연구 및 실험에서 관측되고 있다. 또한, 이러한 현상의 원리뿐만 아니라, 시스템 파라미터와 밸런싱 동특성사이의 관계가 수학적인 분석을 통하여 검증되었다. 직접 변조 방식은 간접 변조 방식(indirect modulation)과 달리, 입/출력 AC 및 DC 측 제어기 외에 암 캐패시터 전압 밸런싱을 위한 순환전류 제어기가 존재하지 않지만, 캐패시터 맥동 저감을 위해 일반적으로 캐패시터 2 고조파 맥동 제어기를 필요로 한다. 본 논문에서는 이러한 직접 변조방식을 사용한 MMC의 2고조파 전압 맥동 제어기가 암 캐패시터 전압 자연 밸런싱에 미치는 영향을 고찰하고 분석한다. 또한, 2 고조파 전압 맥동 제어기의 유무에 따른 전압 자연 밸런싱의 동특성에 대한 비교를 400MW MMC full-scale 시뮬레이션을 통해 살펴보도록 한다.

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A Study on the Development of LA Leakage Current Measuring-Equipment for 800kV GIS(2) (800kV GIS용 피뢰기 누설전류측정장치 개발에 관한 연구(2))

  • Kim, M.S.;Kim, J.B.;Song, W.P.;Kim, D.S.;Kil, G.S.
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1739-1741
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    • 2002
  • 본 논문에서는 현재 당사에서 GIS 제조업체로서 당사의 제품에 대한 예방진단 시스템을 구축한다는 계획의 일환으로서 진행하고 있는 신가평/신태백 765kV 변전소의 800kV/362kV GIS용 피뢰기 누설전류 측정장치 개발에 대한 전반적인 개요와 진행 상황에 대해서 기술하도록 한다. 우선, 피뢰기의 일반적인 열화 특성에 관해서 고찰하며, 개발된 피뢰기 누설전류측정장치의 시스템 구성도를 통해서 미소전류에 대한 신호처리기법을 소개한다. 또한, 본 장치를 개발함에 있어서 진행된 전자기 적합성(Electromagnetic Compatibility) 시험 및 절연 내력 시험에 대해서 서술하며, 시험 전, 후의 입 출력 특성을 확인함으로서 제품의 신뢰성을 검증하도록 하였다.

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An Automatic Fuzzy Rule Extraction using an Advanced Quantum Clustering and It's Application to Nonlinear Regression (개선된 Quantum 클러스터링을 이용한 자동적인 퍼지규칙 생성 및 비선형 회귀로의 응용)

  • Kim, Sung-Suk;Kwak, Keun-Chang
    • Proceedings of the KIEE Conference
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    • 2007.10a
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    • pp.182-183
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    • 2007
  • 본 논문에서는 전형적인 비선형 회귀문제를 다루기 위해 슈뢰딩거 방정식에 의해 표현되는 Hilbert공간에서 수행되는 Quantum 클러스터링과 Mountain 함수를 이용하여, 수치적인 입출력데이터로부터 TSK 형태의 자동적인 퍼지 if-then 규칙의 생성방법을 제안한다. 여기서 슈뢰딩거 방정식은 분석적으로 확률함수로부터 유도되어질 수 있는 포텐셜 함수를 포함한다. 이 포텐셜의 최소점들은 데이터의 특성을 포함하는 클러스터 중심들과 관련되어진다. 그러나 이들 클러스터 중심들은 데이터의 수와 같으므로 퍼지 규칙을 생성하기 어려울 뿐만 아니라 수렴속도가 느린 문제점을 가지고 있다. 이러한 문제점들을 해결하기 위해서, 본 논문에서는 밀도 척도에 기초한 클러스터 중심의 근사적인 추정에 대해 간단하면서 효과적인 Mountain 함수를 이용하여 효과적인 클러스터 중심을 얻음과 동시에 적응 뉴로-퍼지 네트워크의 자동적인 퍼지 규칙을 생성하도록 한다. 자동차 MPG 예측문제에 대한 시뮬레이션 결과는 제안된 방법이 기존 문헌에서 제시한 예측성능보다 더 좋은 특성을 보임을 알 수 있었다.

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A Compensation Method to Improve Dynamic Characteristic of Three-Phase Grid-Connected Back to Back Converter (3상 계통연계형 Back to Back 컨버터의 동특성 개선 방법)

  • Cho, Jin-Ho;Choi, Seong-Chon;Kim, Bum-Jun;Kim, Jung-Min;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2016.11a
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    • pp.77-78
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    • 2016
  • 본 논문에서는 양방향 전력공급이 가능한 3상 Back to Back 컨버터에 필요한 여러 가지 제어 기술들을 살펴보고 시뮬레이션을 통해 제어 알고리즘의 타당성을 분석하며, 입, 출력 전압, 전류 등 파형을 관찰하고 전력을 가변시킬 때 나타나는 3상 계통연계형 Back to Back 컨버터의 동특성을 개선하는 방법을 알아본다.

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Design of the Modified Wilkinson Power Divider Using Coupling and Inductive Slit (결합 특성과 유도성 슬릿을 이용한 새로운 구조의 Wilkinson 전력분배기 설계)

  • Kim, Jin-Pyo;Kim, Sang-Tae;Kim, Won-Gi;Na, Geuk-Hwan;Sin, Cheol-Jae
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.37 no.8
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    • pp.24-32
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    • 2000
  • In this paper, we have designed and fabricated a new type power divider to be efficient to a size and electrical performance by folding each quarter-wavelength 70.7 Ω section into a tightly-coupled "meander-line" and inserting a slit. In this type, because of coupling, the electrical phase of quarter -wavelength line and the performance change. For this reason, with the inductive slit and the tuning of quarter-wavelength line length, we have compensated for those. The inductance value of the inserted slit is decided by its width and depth, therefore, we could improve the electrical performance through optimization of inductance. Input and output return losses of the designed power divider were -34.2 dB, -34.3 dB respectively, and isolation was -36.7 dB at 1.75 GHz. Besides, a new design approach reduced occupied substrate area by 3:1 approximately.

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Design of a GaN HEMT Power Amplifier Using Output Matching Circuit with Arbitrary Harmonic Impedances (임의의 고조파 임피던스를 갖는 출력 정합 회로를 이용한 GaN HEMT 전력증폭기의 설계)

  • Jeong, Hae-Chang;Son, Bom-Ik;Lee, Dong-Hyun;Ahmed, Abdul-Rahman;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.11
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    • pp.1034-1046
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    • 2013
  • In this paper, a design of a GaN HEMT power amplifier using output matching circuit with arbitrary harmonic impedances is presented. The adopted GaN HEMT device, TGF2023-02 of TriQuint Semiconductor, was packaged in commercial package. The optimal impedances of the GaN HEMT package are extracted from load-pull simulation at package input and output reference planes. The targets of load-pull simulation are the highest output power at fundamental frequency and the highest efficiency at $2^{nd}$ and $3^{rd}$ harmonic frequencies. Because of fixture in the package, the extracted impedances shows arbitrary harmonic impedances. In order to match the optimal impedances, output matchin circuit which has 4 transmission lines is presented. Characteristic impedances and electrical lengths of the transmission lines are mathmatically calculated. The power amplfiier with $54.6{\times}40mm^2$ shows the output power of 8 W at the fundamental frequency of 2.5 GHz, the efficiency above 55 %, and harmonic suppression of above 35 dBc at the $2^{nd}$ and the $3^{rd}$ harmonics.

A Multiphase DLL Based on a Mixed VCO/VCDL for Input Phase Noise Suppression and Duty-Cycle Correction of Multiple Frequencies (입력 위상 잡음 억제 및 체배 주파수의 듀티 사이클 보정을 위한 VCO/VCDL 혼용 기반의 다중위상 동기회로)

  • Ha, Jong-Chan;Wee, Jae-Kyung;Lee, Pil-Soo;Jung, Won-Young;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.11
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    • pp.13-22
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    • 2010
  • This paper proposed the dual-loops multiphase DLL based mixed VCO/VCDL for a high frequency phase noise suppression of the input clock and the multiple frequencies generation with a precise duty cycle. In the proposed architecture, the dual-loops DLL uses the dual input differential buffer based nMOS source-coupled pairs at the input stage of the mixed VCO/VCDL. This can easily convert the input and output phase transfer of the conventional DLL with bypass pass filter characteristic to the input and output phase transfer of PLL with low pass filter characteristic for the high frequency input phase noise suppression. Also, the proposed DLL can correct the duty-cycle error of multiple frequencies by using only the duty-cycle correction circuits and the phase tracking loop without additional correction controlled loop. At the simulation result with $0.18{\mu}m$ CMOS technology, the output phase noise of the proposed DLL is improved under -13dB for 1GHz input clock with 800MHz input phase noise. Also, at 1GHz operating frequency with 40%~60% duty-cycle error, the duty-cycle error of the multiple frequencies is corrected under $50{\pm}1%$ at 2GHz the input clock.