• Proceedings of the Korea Information Processing Society Conference
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• 2000.10b
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• pp.985-988
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• 2000

내장형 기기의 다양성 및 적용 범위의 확장으로 내장형 기기용 운영체제도 기기별 다양성을 지원할 것이 요구되고 있다. 이러한 특성을 갖는 운영체제를 조림형 운영체제라 한다. 본 논문에서는 조림형 실시간 운영체제인 Qplus커널의 입출력 시스템 개발에 대하여 기술한다. Qplus의 입출력 시스템은 사용자의 요구에 따라 입출력 장치 구동기의 조림이 가능하며 일관된 사용자 인터페이스 및 간편한 장치 구동기 인터페이스, 빠른 입출력을 지원한다. 현재 SA110 보드를 사용한 ITSB 에서 시험되었으며 앞으로 AIO, 가상 터미널 구동기의 지원 및 입출력 성능 시험을 수행할 예정이다.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.2551-2553
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• 2000

고속 신호처리 및 실시간 제어 분야에 적합한 제어성능을 발휘하기 위해서는 신호처리전용 마이크로프로세서인 DSP(Digital Signal Processor)를 이용한 제어용 보드가 널리 활용되고 있다. 본 연구를 통하여 전기도금용 전원장치의 고성능화를 위하여 DSP제어용 보드를 개발하였으며, 전체구성은 고속 신호처리를 위한 메인 마이크로프로세서로서 경제성과 응용범위가 넓은 TMS320C32 DSP CHIP, Wait없는 프로그램 및 데이터 처리를 위한 고속 SRAM, 외부 디지털 입출력을 위한 인터페이스 회로, 아나로그 입출력 회로 및 PC 혹은 다른 마이크로컴퓨터와의 통신을 위한 직렬 통신 회로 등으로 구성하였다. 개발된 DSP 보드는 시제품 제작을 완료하여 그 성능 및 신뢰성을 검증하였으며, 전기도금장치의 고성능 제어처리를 위하여 채용하여 상품화 개발을 완료하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.2
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• pp.259-266
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• 2021

USB bus not only works with convenience but also transmits data fast and becomes a standard peripheral interface between FPGA development board and personal computer. In this paper FPGA verification system with slave FIFO interface for Cypress FX3 USB 3 bridge chip was implemented. The designed slave FIFO interface consists of host interface module based on FIFO structure, master bus controller and command decoder and supports streaming communication interface for FX3 bridge chip and memory-mapped input and output interface for user design circuit. The ZestSC3 board with Cypress FX3 USB 3 bridge chip and Xilinx Artix FPGA(XC7A35T-1C5G3241) was used to implement FPGA verification system. It was verified that the FPGA verification system for user design circuit operated correctly under various clock frequencies using GUI software developed by visual C# and C++ DLL. The designed slave FIFO interface for FPGA verification system has modular structure and can be applicable to the different user designs with memory-mapped I/O interface.

• Proceedings of the KSME Conference
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• 2000.04a
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• pp.426-432
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• 2000

The hydraulic loading system real-time simulator using a PC and I/O interface board is developed to simulate the dynamic characteristics of hydraulic loading system in real time. The simulator receives the digital on-off control signals generated by the operator through the D/I channels, updates the state and output variables of the hydraulic loading system responding to the input signals and draw the moving pictuters of the lift cylinder, lift arm and loading box on the PC monitor in real time. Also, the operator can observe the displacement and pressure of cylinder, the rotatinal angle, reaction force, and safety factors of lift arm representing the operation of hydraulic loading system through the PC monitor in real time. The real-time simulator can be a very useful tool to design industrial dynamic systems and feel the goodness of the system operation since the operator can observe the moving pictures of the operating system in real time as he operates the real time simulator.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.11a
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• pp.199-203
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• 1999

This paper is on the DSP system design and implementation for real time MPEG-2 AAC multichannel audio, and MPEG-4 object oriented audio coding. This DSP system employs two DSPs of the state of the art TMS320C6701, developed by TI semiconductor. DSP board has PCI interface for downloading application program and control the system. DSP board was designed to use for both encoder and decoder, by setting several switches. The system contains external input and output box also, for A/D and D/A conversion for eight channel audio. The input box converts multi channel digital audio to ADI format, that provides serial interface for eight channel digital audio. And the output box converts ADI format signal to multi channel audio. Through this ADI interface, DSP boards can be connected to input, output box. Implemented DSP system was tested for integration with MPEG-2 AAC encoder and decoder S/W. Currently the DSP system performs realtime AAC 4-channel audio encoding with two DSPs, and 8-channel decoding with one DSP.

• Proceedings of the Korean Society for Emotion and Sensibility Conference
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• 1997.11a
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• pp.129-133
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• 1997

몇 년 전에 개인용 컴퓨터에서 가상현실을 구현하려고 했다면 컴퓨터의 성능 때문에 그 구현은 불가능했을 것이다. 한가지 예로 사람의 인지 능력으 80%를 차지 한다는 시야를 형성하기 위해 필요한 삼차원 가상공간을 만드는 것만 하더라도 실시간 표현을 해야 하므로 삼차원 가속기도 없는 느린 중앙처리장치 때문에 거의 불가능했다. 하지만 근래에 나온 개인용 컴퓨터를 보면 워크스테이션에 가까울만큼의 성능을 가지고 있고 삼차원 가속보드는 그 성능이 더 낳아 졌음에도 가격이 저렴하다. 또 요즘 인텔의 있단 저가형 삼차원 가속기를 생산 할 것이라는 발표나 국내 기업의 저가형 HMD$^{[2,10]}$ (Head Mounted Display)발표 등을 미루어 보아 개인용 컴퓨터에서의 가상현실이 실용화 될 단계에 와 있다고 본다. 따라서 본 논문은 실재로 개인용 컴퓨터를 이용해 가상현실을 구현하는데 따른 문제점 등을 논했고 또 가상현실 기법을 이용해 응용소프트웨어를 개발하기 위한 인터페이스 방법을 소개했다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.9
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• pp.1108-1119
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• 2016

This paper presents the spectral analysis and radiation pattern of low-frequency electromagnetic(EM) leakage signals according to the fundamental operations of smartphones. The EM leakage signals generated by the activation of four I/O sensor modules such as a touch-screen, a camera, a microphone and a speaker are captured by the commercial near-field magnetic probe with 1cm spatial resolution. The analysis results show that the leakage of the EM wave occurs strongly around the activated I/O sensor modules, AP(Application Processor) and memory modules. Also, the distinguishable frequency characteristic is shown in each spectrum of EM leakage signals.

• Aerospace Engineering and Technology
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• v.5 no.2
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• pp.188-194
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• 2006

This paper deals with the development of Engineering Model for the TCU( Thruster Control Unit) and simulation system of the reaction control system using cold gas. TCU communicates with TLM(Telemetry) and ground control console so that it transmits monitoring data of pressures and temperatures for reaction control system. The cpu/communication board performs MIL-STD-1553B communication, RS-422 communication, data input/output processing and program loading to EEPROM. We applied Intel 80386DX Microprocessor, 256Kbytes EEPROM and 256Kbytes SRAM for program storage and execution. Also, we developed the direct access interface circuit to EEPROM and simulation system for TCU.

• Journal of the Korea Society of Computer and Information
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• v.25 no.7
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• pp.1-8
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• 2020

In this paper, we present an implementation of high speed image data transfer using XDMA for a video signal generation / acquisition device developed as a military test equipment. The technology proposed in this study obtains efficiency by replacing the method of copying data using the system buffer in the kernel area with the transmission and reception through the DMA engine in the FPGA. For this study, the device was developed as a PXIe platform in consideration of life cycle, and performance was maximized by using a low-cost FPGA considering mass productivity. The video I/O board implemented in this paper was tested by changing the AXI interface clock frequency and link speed through the existing memory copy method. In addition, the board was constructed using the DMA engine of the FPGA, and as a result, it was confirmed that the transfer speed was increased from 5~8Hz to 140Hz. The proposed method will contribute to strengthening defense capability by reducing the cost of device development using the PXIe platform and increasing the technology level.

• Proceedings of the Korea Concrete Institute Conference
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• 2008.04a
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• pp.1025-1028
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• 2008

Using of maintenance system for gate bridge algorism, We made out algorism and engine for prediction of life cycle by neutralization, freezing-thawing and damage from sea wind. To objective of this system, user can use easily with maintenance system for gate bridge. Also, to improve of maintenance efficiency, web-program made out by superannuated evaluation and analysis of field exposure data. To develope web-program, we framing structure design of database, which is adapted to method of maintenance, repair, and reinforcing