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A Highly Linear Self Oscillating Mixer Using Second Harmonic Injection (2차 고조파 주입을 사용한 고 선형성의 자체 발진 혼합기)

  • Kim, Min-Hoe;Cho, Choon-Sik;Lee, Jae-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.6
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    • pp.682-690
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    • 2012
  • In this paper, a highly linear self oscillating mixers(SOM) using second harmonic injections are presented. The H-slot defected ground structure(DGS) is designed as a balanced resonator for oscillation in the proposed SOM. Since the H-slot DGS resonator achieves a high Q factor, it is a suitable structure to provide low phase noise for the oscillator. The single balanced mixer is utilized in this work and it provides good LO-RF isolation since balanced LO signals are suppressed at the RF input port. In order to inject the second harmonic of the IF, we propose two different methods using feedback loops. In the first method, IF achieves a 3.08 dB conversion gain at 226 MHz with input power of -20 dBm at 5 GHz RF input signal. The IF achieves 2 dB conversion gain at 423 MHz with the input power of -20 dBm at 5.2 GHz RF input signal in the second method. The measured IMD3s are 61.8 dB and 65 dB for the each method. These SOMs present improved linearity compared to that without the second harmonic injection because IMD3s are improved by 18. dB and 21 dB for each method.

Design of a Broadband Single Balanced Diode Mixer Using a Vortical Coupling Structure (Vertical Coupling 구조를 이용한 광대역 단일 평형 다이오드 혼합기의 설계)

  • Lee Myeong-Gil;Yun Tae-Soon;Nam Hee;Lee Jong-Chul
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.4 no.3 s.8
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    • pp.45-50
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    • 2005
  • In this paper, a broadband single balanced mixer is presented using a wideband rat-race implementation by vertical coupling. Frequency is selected as $1.5{\sim}3$ GHz for RF, $1.64{\sim}3.14$ GHz for LO, and 140 MHz for IF signals. When LO signal with 6 dBm at 2.7 GHz is injected, a conversion loss of 7.5 dB and RF to LO isolation of 30 dB are obtained. Also, an average conversion loss of 10 dB, RF to LO isolation of 30 dB, and LO to IF isolation of 45 dB are obtained for frequency band of $1.5{\sim}3$ GHz.

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Binary Search Tree with Switch Pointers for IP Address Lookup (스위치 포인터를 이용한 균형 이진 IP 주소 검색 구조)

  • Kim, Hyeong-Gee;Lim, Hye-Sook
    • Journal of KIISE:Information Networking
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    • v.36 no.1
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    • pp.57-67
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    • 2009
  • Packet forwarding in the Internet routers is to find out the longest prefix that matches the destination address of an input packet and to forward the input packet to the output port designated by the longest matched prefix. The IP address lookup is the key of the packet forwarding, and it is required to have efficient data structures and search algorithms to provide the high-speed lookup performance. In this paper, an efficient IP address lookup algorithm using binary search is investigated. Most of the existing binary search algorithms are not efficient in search performance since they do not provide a balanced search. The proposed binary search algorithm performs perfectly balanced binary search using switch pointers. The performance of the proposed algorithm is evaluated using actual backbone routing data and it is shown that the proposed algorithm provides very good search performance without increasing the memory amount storing the forwarding table. The proposed algorithm also provides very good scalability since it can be easily extended for multi-way search and for large forwarding tables

EEFL using intelligent lighting system control device (EEFL을 이용한 지능형 조명시스템 제어장치)

  • Park, Yang-Jae
    • Journal of Digital Convergence
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    • v.11 no.4
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    • pp.229-234
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    • 2013
  • The purpose of this study is to develop a lighting apparatus of the illuminance and color temperature to maximize the ability of the optimal combination of light sources that can be controlled efficiently control device. Finding people comfortable feeling for indoor lighting that can be used in a variety of color temperature illumination area by combining light sensitivity can be realized. Lighting apparatus for fluorescent lamps with different color temperature of 2000K and 8000K, and by varying the quantity of each of the fluorescent lamps, the illuminance of lighting equipment and color temperature through optical simulations were evaluated. By infrared remote control receiver, divided into 5 types of relaxation, conversation, meeting, hospitality, arts and the lighting environment you want to transfer the PC0 ~ PC4 through the parallel port on the mode selected by the user at the receiving end the DC voltage output. EEFL inverter input DC voltage and the DC input voltage, depending on the level of EEFL dimming value (illuminance and color temperature) lighting environment you want to create change while using a PIR sensor EEFL automatically turn off if people do not have was developed so that the power consumption so you can save.

The Performance Analysis of a Novel Optical Space Switch Employing Multihop Structure and Time Division Multiplexing (시분할 다중합 방식과 멀티 홉 구조를 적용한 새로운 광 공간 스위치의 성능 분석)

  • 전인중;정준영;김세환;정제명;신서용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.11C
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    • pp.1139-1151
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    • 2002
  • In this paper, we propose the novel module-type optical space switch, employing time division multiplexing (TDM) method and multihop structure, in order to enlarge the capacity of the switching system. And we show that the proposed structure is superior over conventional ones, in terms of power loss, the number of the devices used, and signal to crosstalk (SXR). We also analyze the saturation throughput with the number of module M. As a result, the saturation throughput of the switching system with M modules is M+ 1-√(M$^2$+1), when the number of input port in a module (N) is large. Finally, we confirmed the cell loss rate (CLR) performance with the proposed switch through simulation. For example, when p=0.9, M=8 and N=32, to get the CLR that is less than or equal to 10$\^$-6/, the number of input buffers storage unit is greater than or equal to 6 and output buffers storage unit is greater than or equal to 52.

A VLSI Array Processor Architecture for High-Speed Processing of Full Search Block Matching Algorithm (완전탐색 블럭정합 알고리즘의 고속 처리를 위한 VLSI 어레이 프로세서의 구조)

  • 이수진;우종호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.4A
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    • pp.364-370
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    • 2002
  • In this paper, we propose a VLSI array architecture for high speed processing of FBMA. First of all, the sequential FBMA is transformed into a single assignment code by using the index space expansion, and then the dependance graph is obtained from it. The two dimensional VLSI array is derived by projecting the dependance graph along the optimal direction. Since the candidate blocks in the search range are overlapped with columns as well as rows, the processing elements of the VLSI array are designed to reuse the overlapped data. As the results, the number of data inputs is reduced so that the processing performance is improved. The proposed VLSI array has (N$^2$+1)${\times}$(2p+1) processing elements and (N+2p) input ports where N is the block size and p is the maximum search range. The computation time of the rat reference block is (N$^2$+2(p+1)N+6p), and the block pipeline period is (3N+4p-1).

Fabrication of All-fiber 7x1 Pump Combiner Based on a Fiber Chip for High Power Fiber Lasers (고출력 광섬유 레이저를 위한 광섬유 칩 기반 All-fiber 7x1 펌프 광 결합기 제작)

  • Choi, In Seok;Jeon, Min Yong;Seo, Hong-Seok
    • Korean Journal of Optics and Photonics
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    • v.28 no.4
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    • pp.135-140
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    • 2017
  • In this paper, we report measured results for an all-fiber $7{\times}1$ pump combiner based on an optical fiber chip for high-power fiber lasers. An optical-fiber chip was fabricated by etching a fiber, having core and cladding diameters of 20 and $400{\mu}m$, in the longitudinal direction. To both ends of the etched chip, we spliced input and output fibers. First, we tied together seven optical fibers, having core and cladding diameters of 105 and $125{\mu}m$ respectively, in a cylindrical bundle and spliced them to the $375-{\mu}m$ end of the optical-fiber chip. Then, we attached an output DCF with core and cladding diameters of 25 and $250{\mu}m$ to the $250-{\mu}m$ end of the optical-fiber chip. Finally, the fabricated $7{\times}1$ pump combiner showed an average optical coupling efficiency of about 90.2% per port. This chip-based pump combiner may replace conventional pump combiners by massive production of fiber chips.

Wideband Square Loop Antenna with Circular Sectors for Digital TV (원형 섹터가 추가된 DTV용 광대역 정사각형 루프 안테나)

  • Yeo, Junho;Lee, Jong-Ig
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.10
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    • pp.1845-1851
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    • 2016
  • In this paper, a design method for a wideband square loop antenna for Digital TV applications is studied. The proposed loop antenna is a square loop antenna combined with circular sectors to connect with central feed points. The square loop is used instead of the circular loop in order to miniaturize the antenna size. The input reflection coefficient and gain characteristics of the proposed antenna are analyzed to match with the 75 ohm port impedance for DTV applications. The effects of the gap between the circular sectors and the length of the square loop on the input reflection coefficient and gain characteristics are examined to obtain the optimal design parameters. The optimized antenna is fabricated on an FR4 substrate, and the experiment results show that it operates in the frequency band of 470-1,300 MHz for a VSWR < 2, which assures the operation in the DTV band.

Optimized Binary-Search-on- Range Architecture for IP Address Lookup (IP 주소 검색을 위한 최적화된 영역분할 이진검색 구조)

  • Park, Kyong-Hye;Lim, Hye-Sook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.12B
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    • pp.1103-1111
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    • 2008
  • Internet routers forward an incoming packet to an output port toward its final destination through IP address lookup. Since each incoming packet should be forwarded in wire-speed, it is essential to provide the high-speed search performance. In this paper, IP address lookup algorithms using binary search are studied. Most of the binary search algorithms do not provide a balanced search, and hence the required number of memory access is excessive so that the search performance is poor. On the other hand, binary-search-on-range algorithm provides high-speed search performance, but it requires a large amount of memory. This paper shows an optimized binary-search-on-range structure which reduces the memory requirement by deleting unnecessary entries and an entry field. By this optimization, it is shown that the binary-search-on-range can be performed in a routing table with a similar or lesser number of entries than the number of prefixes. Using real backbone routing data, the optimized structure is compared with the original binary-search-on-range algorithm in terms of search performance. The performance comparison with various binary search algorithms is also provided.

A cell scheduling of a logically separated buffer in ATM switch (ATM 스위치에서 논리적으로 분할된 버퍼의 셀 스케쥴링)

  • 구창회;나지하;박권철;박광채
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.8
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    • pp.1755-1764
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    • 1997
  • In this paper, we proposed the mechanism for the buffer allocation and a cell scheduling method with logical separation a single buffer in the ATm switch, and analyzed the cell loss probability and the delay of each trafic (CBR/VBR/ABR) based on the weighted value and the dynamic cell service scheduling algorithm. The proposed switch buffering system classifies composite trafics incoming to the switch, according to the characteristic of traffic, then stores them in the logically separated buffers, and adopts the round-robin service with weighted value in order to transmit cells in buffers though one output port. We analyzed 4 cell service scheduling algorithms with dynamic round-robinfor each logically separated service line of a single buffer, in which buffers have the respective weighted values and 3 classes on mixed traffic which characteristized by traffic descriptor. In simulation, using SIMCRIPT II.5., we model the VBR and the ABR traffics as ON/OFF processes, and the CBR traffic as a Poisson processes. As the results of analysis according to the proposed buffer management mechanism and cell service algorithm, we have found that the required QoS of each VC can be quaranteed depends on a scale of weighted values allocated to buffers that changed the weighted values, and cell scheduling algorithm.

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