• Title/Summary/Keyword: 유효 비트

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Efficient CAVLC Decoder VLSI Design for HD Images (HD급 영상을 효율적으로 복호하기 위한 CAVLC 복호화기 VLSI 설계)

  • Oh, Myung-Seok;Lee, Won-Jae;Kim, Jae-Seok
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.44 no.4 s.316
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    • pp.51-59
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    • 2007
  • In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) decoding which used for baseline profile and extended profile. Previous CAVLC architectures are consisted of five step block and each block gets effective bits from Controller block and Accumulator. If large number of non-zero coefficients exist, process for getting effective bits has to iterates many times. In order to reduce this unnecessary process, we propose two techniques, which combine five steps into four steps and reduce process to get efficiency bit by skipping addition step. By adopting these two techniques, the required processing time was reduced about 26% compared with previous architectures. It was designed in a hardware description language and total logic gate count was 16.83k using 0.18um standard cell library.

An Encrypted Botnet C&C Communication Method in Bitcoin Network (비트코인 네크워크에서의 암호화된 봇넷 C&C 통신기법)

  • Kim, Kibeom;Cho, Youngho
    • Journal of Internet Computing and Services
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    • v.23 no.5
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    • pp.103-110
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    • 2022
  • Botnets have been exploited for a variety of purposes, ranging from monetary demands to national threats, and are one of the most threatening types of attacks in the field of cybersecurity. Botnets emerged as a centralized structure in the early days and then evolved to a P2P structure. Bitcoin is the first online cryptocurrency based on blockchain technology announced by Satoshi Nakamoto in 2008 and is the most widely used cryptocurrency in the world. As the number of Bitcoin users increases, the size of Bitcoin network is also expanding. As a result, a botnet using the Bitcoin network as a C&C channel has emerged, and related research has been recently reported. In this study, we propose an encrypted botnet C&C communication mechanism and technique in the Bitcoin network and validate the proposed method by conducting performance evaluation through various experiments after building it on the Bitcoin testnet. By this research, we want to inform the possibility of botnet threats in the Bitcoin network to researchers.

Online Cursive Handwriting Character Recognition Using a Bitmap Parameter (비트맵 파라미터를 이용한 온라인 필기체 문자인식)

  • 석수영;김민정;정호열;정현열
    • Proceedings of the IEEK Conference
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    • 2001.09a
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    • pp.421-424
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    • 2001
  • 개별적인 인식기를 하나의 단일 인식 시스템으로 구성하여 음성과 문자를 인식할 수 있는 공용인식시스템의 성능향상을 위해 온라인 필기에서 전역적인 정보를 추출할 수 있는 비트맵 파라미터 추출 방법을 제안하였다. 제안된 방식에서는 고속의 파라미터 추출을 위해 보간법을 이용한 재샘플링 과정 대신에 새로운 시간열을 구성하는 방식을 이용한다. 제안한 비트맵 파라미터를 본 연구실에서 개발한 음성/문자 공용인식 시스템에 적용하기 위하여 67개의 자소를 5상태 10천이 CHMM(Continuous Hidden Markov Model)모델로 구성한 다음 인식알고리즘으로서는 상태단위로 지속 시간 정보를 제어하는 OnePassDP법을 이용하였다. 실험결과, 제안한 방법을 이용한 경우, 자소인식률은 61.3%에서 85.3%로 24%의 인식률 향상을 가져왔으며, 글자인식률은 64.3%에서 82.2%로 17.9%의 인식률 향상을 가져와 제안한 방법의 유효성을 확인할 수 있었다.

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A Study of Realtime scalability converted bitstream extraction (실시간 스케일러빌러티 변환 SVC 비트스트림에 대한 연구)

  • Bae, Tae-Meon;Kim, Duck-Yeon;Ro, Yong-Man;Kang, Jung-Won;Kim, Jae-Gon
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2005.11a
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    • pp.163-166
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    • 2005
  • 스케일러블 비디오 부호화 (Scalable Video coding)는 시간, 공간, 화질의 스케일러빌러티를 가지는 비트스트림을 제공하므로, 가변하는 네트워크 환경에서 QoS 를 만족시키는 비디오 서비스를 가능케 한다. 먼저 스케일러블 비디오 부호화에서 실시간으로 가변 가능한 스케일러빌러티에 대한 분석을 하였으며, 이를 바탕으로 본 논문에서는 실시간으로 스케일러블 비디오 비트스트림의 시간, 및 화질을 변화하며 추출할 수 있는 방법을 제안한다. 제안한 방법은 JSVM2.0에 구현되었으며, 실험 결과는 제안한 방법이 유효함을 보여준다.

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A 12-bit 1MSps SAR ADC using MOS Capacitor (MOS 커패시터를 이용한 12비트 1MSps 연속 근사화 레지스터 아날로그-디지털 변환기)

  • Seong, Myeong-U;Kim, Cheol-Hwan;Choi, Seong-Kyu;Choi, Geun-Ho;Kim, Shin-Gon;Han, Gi-Jung;Rastegar, Habib;Ryu, Jee-Youl;Noh, Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.293-294
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    • 2014
  • 본 논문에서는 MOS 커패시터를 이용하여 12비트 1MSps 연속 근사화 레지스터 아날로그-디지털 변환기(Successive Approximation Register Analog-to-Digital Converter, SAR ADC)를 설계하였다. 설계된 아날로그-디지털 변환기는 매그나칩/SK하이닉스 $0.18{\mu}m$ 공정을 이용하였으며, Cadence Tool을 이용하여 시뮬레이션 및 레이아웃을 하였다. 시뮬레이션 결과 1.8V의 공급전압에서 전력 소모는 3.22mW였고, 유효 비트수는 11.5bit의 결과를 보였다.

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Design of The 10bit 80MHz CMOS D/A Converter with Switching Noise Reduction Method (스위칭 잡음 감소기법을 이용한 10비트 80MHz CMOS D/A 변환기 설계)

  • Hwang, Jung-Jin;Seon, Jong-Kug;Park, Li-Min;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.6
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    • pp.35-42
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    • 2010
  • This paper describes a 10 bit 80MHz CMOS D/A converter for wireless communication system. The proposed circuit in the paper is implemented with a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process. The architecture of the circuit consists of the 4bit LSB with binary decoder, and both the 3bit ULSB and the 3bit MSB with the thermometer decoder. The measurement results demonstrates SFDR of 60.42dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB of 8.75bit. INL and DNL have been measured to be ${\pm}$0.38LSB and ${\pm}$0.32LSB and glitch energy is measured to be 4.6$pV{\cdot}s$. Total power dissipation is 48mW at 80MHz(maximum sampling frequency) with a single power supply of 1.8V.

Conditional Access Control for Encrypted SVC Bitstream (암호화된 SVC 비트스트림에서 조건적 접근제어 방법)

  • Won Yong-Geun;Bae Tae-Meon;Ro Yong-Man
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.3
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    • pp.87-99
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    • 2006
  • In this paper, we propose a method of conditional access control for encrypted SVC(scalable video coding) bitstream. The main purpose of the proposition is to provide a SVC suitable encryption algorithm and a efficient method for conditional access control using encrypted SVC bitstream. We analyzed requirements for conditional access control of a SVC bitstream. And based on the analysis, we proposed encryption algorithm suitable for SVC bitstream and a method of conditional access control of the encryped bitstream. The proposed conditional access control for encrypted SVC bitstream is performed by bitsream extraction and selective decryption. We verified the usefulness of the proposed method through experiments.

Development of mA Level Active Leakage Current Detecting Module (mA급 유효성분 누설전류 감지 모듈 개발)

  • Han, Young-Oh
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.1
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    • pp.109-114
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    • 2017
  • In this study, we have developed the active leakage current detection module based on a MSP430 processor, 16bit signal processor. This module can be operated in a desired trip threshold within 0.03 seconds as specified in KS C 4613. This developed module is expected to be applicable as a module for prevention of electric shock in smart distribution panel of smart grid.

Technical Trends and Patent Analysis for Reaming Bits (확공비트의 기술동향 및 특허분석)

  • Min, Kyung-Nam;Jung, Chan-Muk;Kim, Gyui-Woong
    • The Journal of Engineering Geology
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    • v.23 no.2
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    • pp.127-136
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    • 2013
  • We analyzed the patent trends for whole drilling bits to reveal the main R&D directions, focusing on patents applied for and registered in Korea, the USA, Japan, and Europe. The technology was classified into two groups as a primary classification step (reaming systems and fixed systems), and into seven groups as a secondary classification step (sliding, odex, horizontal pivot, vertical pivot, concentric, eccentric, and etc.). A total of 33,614 patents were retrieved and 870 patents were selected for final effective analysis by data deduplication and filtering. A portfolio analysis using the correlation between the number of patents and the applicants for each patents revealed a sliding system as the key technology with greatest growth potential. From an analysis of the barriers to patents being granted, we emphasize the need to avoid similar topics existing patents or patent applications and to develop differential technology.