• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제11권5호
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• pp.715-722
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• 2000

In this paper, the PLDRO is designed and implemented for X-band. It is comprised of tunable high Q resonator with a varactor diode for frequency tuning, loop filter and a 1/8 prescaler which up to 10GHz. Also, it is implemented a TCXO and a VCO signal into the phase detector and achieved a highly stable signal source. From the measurement, the designed PLDRO has the output power of 2.5dBm at 8GHz and phase noise of -64.33dBc at 10KHz offset from carrier. Its characteristic is 26 dBc. This PLDRO has much better temperature stability.

• Journal of Navigation and Port Research
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• 제27권5호
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• pp.513-517
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• 2003

In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator} applied to X-band as stable source is implementea and constructed with a MESFET for low noise, a dielectric resonator of high frequency selectivity and high Q varactor diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated through the harmonic balance simulation technique to provide the optimum performance. The measured results of a fabricated VCDRO show that output is 2.22dBm at 12.05GHz. harmonic suppression -30dBc. phase noise -130dBc at 100kHz offset. and sweep range of varactor diode $\pm$18.7MHz. respectively. This oscillator will be available to X-band application.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제23권5호
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• pp.613-623
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• 2012

In this paper, we present an ultra miniaturized voltage tuned oscillator, with HMIC-type amplifier and phase shifter, using LTCC artificial dielectric resonator. ADR which consists of periodic conductor patterns and stacked layers has a smaller size than a dielectric resonator. The design specification of ADR is obtained from the design goal of oscillator. The structure of the ADR with a stacked circular disk type is chosen. The resonance characteristic, physical dimension and stack number are analyzed. For miniaturization of ADRO, the ADR is internally implemented at the upper part of the LTCC substrate and the other circuits, which are amplifier and phase shifter are integrated at the bottom side respectively. The fabricated ADRO has ultra small size of $13{\times}13{\times}3mm^3$ and is a SMT type. The designed ADRO satisfies the open-loop oscillation condition at the design frequency. As a results, the oscillation frequency range is 2.025~2.108 GHz at a tuning voltage of 0~5 V. The phase noise is $-109{\pm}4$ dBc/Hz at 100 kHz offset frequency and the power is $6.8{\pm}0.2$ dBm. The power frequency tuning normalized figure of merit is -30.88 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제23권6호
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• pp.691-699
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• 2012

In this paper, we present a Vt-DRO with a low phase noise, which is achieved by improving the coupling structure between the dielectric resonator and microstrip line. The Vt-DRO is a closed-loop type and is composed of 3 blocks; dielectric resonator, phase shifter, and amplifier. We propose a mathematical estimation method of phase noise, using the group delay of the resonator. By modifying the coupling structure between the dielectric resonator and microstrip line, we achieved a group delay of 53 nsec. For convenience of measurement, wafer probes were inserted at each stage to measure the S-parameters of each block. The measured S-parameter of the Vt-DRO satisfies the open-loop oscillation condition. The Vt-DRO was implemented by connecting the input and output of the designed open-loop to form a closed-loop. As a result, the phase noise of the Vt-DRO was measured as -132.7 dBc/Hz(@ 100 kHz offset frequency), which approximates the predicted result at the center frequency of 5.3 GHz. The tuning-range of the Vt-DRO is about 5 MHz for tuning voltage of 0~10 V and the power is 4.5 dBm. PFTN-FOM is -31 dBm.

• Journal of the Korea Institute of Information and Communication Engineering
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• 제8권1호
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• pp.34-40
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• 2004

The PLDRO(Phase-Locked Dielectric Resonator Oscillator) with low phase noise is designed for X-band. The phase of VCDRO(Voltage Controlled Dielectric Resonator Oscillator) is locked to that of a high stable reference oscillator by using a SPD(Sampling Phase Detector) to improve phase noise performance in the loop bandwidth. And, the VCDRO is implemented using a high impedance inverter coupled with dielectric resonator to improve the phase noise performance out of the loop bandwidth. This PLDRO exhibits the harmonic rejection characteristics of 51.67㏈c and requires below 1.95W. The phase noise characteristics are performed as -107.17㏈c/Hz at 10KHz offset frequency and -113.0㏈c/Hz at 100KHz offset frequency, respectively, at ambient. And the output power of 13.0㏈m${\pm}$0.33㏈ is measured over the temperature range of $-20 ∼ +70^{\circ}C$ .

• Journal of the Korea Institute of Information and Communication Engineering
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• 제8권4호
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• pp.906-911
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• 2004

In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator) applied to FMCW(Frequency Modulated Continuous Wave)Radar as stable source is implemented and constructed with a MESFET(Metal-semiconductor Field-Effect Transistor) for low noise, a dielectric resonate. of high frequency selectivity, and high Q varator diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated thrash harmonic balance simulation technique to provide the optimum performance. The measured result of a fabricated VCDRO shows that output is 2.22㏈m at 12.05GHz, harmonic suppression -30㏈c, phase noise -130㏈c at 100KHz offset, and sweep range of varator diode $\pm$18.7MHz, respectively. This oscillator will be available to FMCW Radar.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• 제25권3호
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• pp.269-281
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• 2014

In this paper, a systematic design of a low phase noise voltage-tuned dielectric resonator oscillator(VTDRO) using loop group delay is proposed. Designed VTDRO is closed-loop type and consists of a cascade connection of a resonator, phase shifter, and amplifier. Firstly, a reference VTDRO is fabricated and its phase noise and electrical frequency tuning range are measured. Both the phase noise and electrical frequency tuning range depend on the loop group delay. Then, a required value of loop group delay for a new VTDRO with a low phase noise can be systematically computed. In addition, its phase noise and electrical frequency tuning range can be theoretically estimated using those obtained from the measurement of the reference VTDRO. When the loop group delay increases, the phase noise decreases and the electrical frequency tuning range also decreases. The former predominantly depends on the resonator structure. Therefore we propose a systematic design procedure of a resonator with high group delay characteristics. The measured loop group delay of the new VTDRO is about 700 nsec. The measured phase noise of the new VTDRO show a state-of-the-art performance of 154.5 dBc/Hz at 100 kHz frequency offset and electrical frequency tuning range of 448 kHz for a voltage change of 0~10V. The oscillation power is about 4.39 dBm.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• 제1권1호
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• pp.1-9
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• 2002

In this paper, a DRO (Dielectric Resonator Oscillator) with high stability in DSRC(Dedicated Short Range Communication) is designed and fabricated. The DRO shows the phase noise characteristic of -109.3 dBc/Hz at 100 kHz offset from the fundamental frequency. The output power of 11.53 dBm, and the second harmonic suppression of 55.33 dBc for the DRO are obtained. This DRO with high stability of the phase noise characteristic can be used for the system in DSRC.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제25권11B호
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• pp.1858-1863
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• 2000

본 논문에서는 SPD(Sampling Phase Detector)를 이용한 위상고정 방법의 무선 CATV용 위상 고정 유전체 공진 발진기(PLDRO)를 설계·제작하였다. 이 발진기는 하이브리드 형태인 12.875 GHz의 VCDRO(Voltage Controlled Dielectric Resonator Oscillator)와 완충 증폭기, 방향성 결합기, 주파수 체배기, 샘플링 위상 검출기, 루프 필터, 기준 주파수 발진기, VHF 증폭기로 구성되어 있다. 위상 고정 유전체 공진 발진기의 발진출력은 25.75 GHz에서 1.17 dBm, 기본주파수 억압 -27.83 dBc로 안정된 위상고정 상태를 나타내었다. 이때의 위상잡음은 -101.7 dBc/Hz @ 100KHz로 측정되었다.

• Journal of IKEEE
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• 제16권2호
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• pp.121-126
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• 2012

In this paper, a push-push VCDRO (Voltage Controlled Dielectric Resonator Oscillator) with a modified frequency tuning structure is investigated. The push-push VCDRO designed at 16GHz is manufactured using a LTCC (Low Temperature Co-fired Ceramic) technology to reduce the circuit size. The frequency tuning structure is embedded in intermediate layer of A6 substrate by an advantage of LTCC process. Experimental results show that the fundamental frequency suppression is above 30dBc, the frequency tuning range is 0.43MHz over control voltage of 0 to 12V, and phase noise of push-push VCDRO presents a good performance of -103dBc/Hz at 100KHz offset frequency from carrier.