• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.10
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• pp.1973-1981
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• 1994

A PLDRO(Phase Locked Dielectric Resonator Oscillator) in Ku-band(10.95-11.70GHz) is designed with the concept of the feedback property of PLL(Phase Locked Loop). A series feedback type DRO is developed, and VCDRO(Voltage Controlled Dielectric Resonator Oscillator) using a varactor diode as a voltage-variable capacitor is implemented to tune oscillating frequency electrically. Then, PLDRO is designed by using a SPD(Sampling Phase Detector). This PLDRO is phase-locked voltage controlled DRO to reference source(VHF band) by SPD at 10.00 GHz for European FSS(Fixed Satellite Service). The PLDRO generates output power greater than 10dBm at 10.00 GHz and has phase noise of -80 dBc/Hz at 10 KHz offset from carrier. This PLDRO achieves much better frequency stability than conventional VCDRO.

• 한국정보통신설비학회:학술대회논문집
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• 2002.08a
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• pp.31-34
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• 2002

본 논문은 Ku-band(12.4-18 GHz) 위성통신 시스템 및 이동통신 중계기용 송수신부에 사용되는 고안정도 전압제어 유전체 공진기(Voltage Controlled Dieletric Resonator Oscillator)의 설계 및 제작에 대해 논하였다. 유전체 공진기(Dielectric Resonator)의 등가회로 모델을 이용하여 유전체 공진 발진기(Dielectric Resonator Oscillator)를 설계 알고리즘화 하였다. 유전체 공진 발진기와 바렉터 다이오드를 이용하여 13.4 GHz의 전압 제어 유전체 공진 발진기를 제작하였다. 이때의 출력 전력은 +12dBm이고 위상잡음은 offset 주파수 100kHz에서 -105 dBc/Hz로 측정되었다.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.1
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• pp.17-24
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• 2014

In this paper, we analysed coupling coefficient between dielectric resonator of high dielectric constant and microstrip line to design for low phase noise dielectric resonator by direct coupling. Also we analysed phase noise of dielectric resonance oscillator with parallel feedback circuit to complement Q by high dielectric constant. We obtained a result from high-stability dielectric oscillator which is optimum designed through analysis of dielectric resonance oscillator phase noise and coupling coefficient. The result is that the phase noise was -83.3dBc/Hz@1KHz at 20.25GHz when we used about 3.6 coupling coefficient and ${\epsilon}_r$=30 dielectric resonator of 20.25GHz dielectric resonance oscillator. As a result, we suggested the direct-connect design method by frequency multiplication mode to prevent phase noise loss at K-Band.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.947-954
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• 1999

A new low phase noise Dielectric Resonator Parallel Feedback Oscillator(DRPFO) that is proposed in this paper has a simple structure so that it can be fabricated in low cost and with high performance. The proposed DRPFO is in a feedback loop oscillator configuration, which is composed of a low noise amplifier, a power amplifier, a power attenuator, a power divider and a parallel resonator feedback element that consists of a dielectric resonator coupled with two microstrip lines. The measured phase noise of DRPFO was less than -81 dBc/Hz at offset frequency 1 kHz of 10.75 GHz carrier frequency, and the frequency stability of DRPFO was less than $\pm$200 kHz over the temperature range of -40$^{\circ}$C to +60$^{\circ}$C.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.408-414
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• 2005

The VCDRO(Voltage Controlled Dielectric Resonate. Oscillator) with low phase noise is designed using nonlinear analysis, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise performance, and the quality factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCDRO and the reliability analysis is accomplished to estimate the probability of operation at the end of life. The developed VCDRO has the oscillating tuning factor of 0.56MHZ1V for the control voltage range of 0-l2V. This VCDRO requires the DC power of 136mW. The phase noise characteristics exhibit good performances of -94.18dBc/Hz (a)10KHz and -116.3dBc/Hz (a)100KHz. And, the output power over 7.33dBm is measured.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.541-546
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• 2010

The push-push DRO(dielectric resonator oscillator) using a multi-layer structure of LTCC(low temperature co-fired ceramic) fabrication is designed. After the single DRO of series feedback type in the center frequency of 8GHz is designed, the push-push DRO in the center frequency of 16GHz including the Wilkinson power combiner is designed. The bias circuit affecting the size of oscillator are embedded in the intermediate layer of the LTCC multi-layer substrate. As a result, the large reduction in the size of VCO is obtained compared to the general oscillator on the single layer substrate. Experimental results show that the fundamental and third harmonics suppression are above 15dBc and 25dBc, respectively, and phase noise characteristics of the push-push DRO presents performance of -102dBc/Hz@100KHz and -128dBc/Hz@1MHz offset frequencies from carrier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.2
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• pp.187-195
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• 1999

A series feedback DRO operating at 3.2 GHz applicable to the spectrum analyzer as the second local oscillator, is designed and fabricated. We can obtain a low noise by utilizing the small signal S-parameter of the transistor and adjusting the reflection coefficient from the coupling coefficient between dielectric resonator and microstrip line. The results show that output power is 10.50 dBm, a stable low phase noise is -116 dBc/Hz at a 10 kHz offset frequency and a harmonic characteristic is 19.33 dBc.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.10
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• pp.1982-1990
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• 1994

We implemented a PLDRO(Phase Locked Dielectric Resonator Oscillator) using the concept of the feedback property of PLL(Phase Locked Loop) for Ku-band(10.95-11.70 GHz). The conventional approaches to a PLDRO design use varactor diode tuning method.. But in theis paper, the PLDRO has the advantage of the frequency sensitivity to changes in the supple voltage of the oscillating device without the frequency-variable part by varactor diode voltage-control. and uses a SPD(Sampling Phase Detector) for phase-comparision. The PLDRO is composed of the DRO phase-locked to the reference signal of UHF band by using a SPD for high frequency stability and can be available for European FSS(Fixed Satellite Service) at 10.00GHz. The PLDRO generates the output power of 8.67 dBm at 10.00 GHz and has a phase noise of -81 dBc/Hz at 10 kHz offset from carrier. The hamonic and spurious characteristics have -42.33 dBc and -65dBc respectively. This PLDRO has much better frequency stability, lower phase noise, and more economical effect for a satellite system than conventional DRO.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.162-166
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• 2000

본 논문에서는 Ku-band용 전압제어 유전체 공진 발진기를 위상잡음 특성을 고려하여 설계하였다. 유전체의 높은 Q값은 좋은 위상잡음특성에 영향을 주나 전압제어를 위해 바렉터 다이오드의 연결된 튜닝 마이크로스트립라인의 길이에 따라 Q값의 변화하고 이로 인해 위상잡음 특성이 변화하am로 이를 고려하여 최적의 튜닝 마이크로스트립라인 길이를 시뮬레이션 견과를 통해 얻은 후 전압제어 유진체 발진기를 설계 하였다.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.6 no.2
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• pp.27-34
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• 1995

In this paper, an X-band TDRO(transistor dielectric resonator oscillator) is designed and experimented with the oscillator constructed. Design of the TDRO is carried out by deriving analycally the coupling parameters between a microstrip line and a dielectric resonator. The coupling parameters take account of the relations among substrate material, ground plane, metallic boundaries surrounding the resonator, distance between a microstrip line and a resonator. Two criteria, external quality factor and coupling coefficient, have been chosen in order to evaluate the performance of the TDRO designed. TDRO studed in this paper may be useful for the application of a microwave system requiring a stable and effective oscillator frequency.