• Title/Summary/Keyword: 위상 선택방식

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PERFORMANCE ANALYSIS OF DPSK SIGNAL ON THE TWO-RAY TIME-SELECTIVE RAYLEIGH FADING CHANNEL (Two-ray 시간선택성 레일레이 페이딩 채널상에서 DPSK 신호의 성능분석)

  • 이종열;정영모;이상욱
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1997.11a
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    • pp.9-13
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    • 1997
  • 본 논문에서는 two-ray 시간선택성 레일레이 페이딩 채널상에서 DPSK 신호를 차동검출 (differential detection)할 때 심볼에러율을 분석한다. 현재까지 수행된 많은 연구는 주파수 선택성 페이딩 채널 및 단일 경로 시간선택성 페이딩 채널을 대상으로 하였고, 다경로 시간선택성 페이딩 채널을 대상으로 한 예는 극히 드물다. 또한 다경로 시간선택성 페이딩 채널을 가장 간단히 모델링 할 수 있는 two-ray 페이딩 채널에 대한 연구도 지금까지 수행된 예가 극히 적다. 본 논문에서는 심볼열의 형태에 따라 수신신호들간의 관계를 세가지 그룹으로 나눈 후 각각의 경우에 대하여 위상 옵셋값을 계산하는 방식을 취하였다. 이와 같이 계산된 위상옵셋과 신호대 잡음비를 인자로 하여 차동검출된 신호가 가지는 위상의 확률밀도 함수를 계산하고 이 함수를 이용하여 심볼에러율을 계산하였다. 결과로부터 two-ray 페이딩 채널의 특성을 결정짓는 지연시간과 지연신호의 전력이 증가함에 따라 위상 옵셋값 및 에러율이 모두 증가하는 것을 확인하였다.

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Clock and Date Recovery Circuit Using 1/4-rate Phase Picking Detector (1/4-rate 위상선택방식을 이용한 클록 데이터 복원회로)

  • Jung, Ki-Sang;Kim, Kang-Jik;Cho, Seong-Ik
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.1
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    • pp.82-86
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    • 2009
  • This work is design of clock and data recovery circuit using system clock. This circuit is composed by PLL(Phase Locked Loop) to make system clock and data recovery circuit. The data recovery circuit using 1/4-rate phase picking Detector helps to reduce clock frequency. It is advantageous for high speed PLL. It can achieve a low jitter operation. The designed CDR(Clock and data recovery) has been designed in a standard $0.18{\mu}m$ 1P6M CMOS technology and an active area $1{\times}1mm^2$.

Characteristics Analysis of the Time Selective Multipath Fading Channel Model for Mobile Communication (이동 통신을 위한 시간선택성 다중경로 페이딩 채널 모델의 특성 평가)

  • 박수진;고석준;이경하;최형진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.5A
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    • pp.836-845
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    • 2001
  • 본 논문에서는 시간 선택성 다중경로 이동 무선 채널을 다양한 방법으로 모델링 하고 그에 따른 여러 가지 특성평가를 제시하였다. 모델링 방법에는 Jakes 방식과 시간 영역에서 독립적인 두 개의 가우시안 잡음 발생기와 정형필터(shaping filter)를 사용하는 방식 및 주파수 영역에서 필터링 하는 방식이 있다. 이 세 가지 모델링 방법의 성능을 진폭의 자기상관함수, 상호상관함수, 누적분포함수(Cumulative Distribution Function), 레벨 교차율(Level Crossing Rate), 평균 페이딩 지속 시간(Average Duration of Fades), 위상차의 확률 밀도, 위상차의 자기상관함수 등의 측면에서 시뮬레이션하고 그 결과치와 이론치 간의 특성 비교를 제시하였다. 특히, 확산 대역 시스템을 고려했을 때 이상적인 채널 추정을 가정한 레이크 수신기에서의 BER 성능을 다중경로 개수에 따라 보임으로써 여러 가지 채널 모델링 중에서 주파수 영역에서 필터링 하는 방식이 이동 무선 채널을 모델링 하는데 있어 가장 적합하다는 것을 보였다. 마지막으로 비대칭 도플러(Doppler) 스펙트럼을 모델링 하는 것도 주파수 영역에서 필터링 하는 방식이 편리하다.

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A Study on the Phase Diversity and Optimal I/Q Signal Combining Methods on a UHF RFID Receiver (UHF RFID 수신기의 위상 다이버시티 및 최적 I/Q 신호 결합 방법에 관한 연구)

  • Jang, Byung-Jun;Song, Ho-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.4
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    • pp.442-450
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    • 2008
  • In this paper, the phase diverisity in a direct-conversion receiver for a UHF RFID reader is analyzed and the optimal I/Q signal combining methods is presented with respect to tag modulation. At first, fading characteristics of a single channel receiver is shown to prove the importance of phase diversity due to the phase relationship between the backscattered signal and the local oscillator. And the optimal signal combining methods are presented in order to overcome the signal power reduction due to phase diversity. In case of ASK, the power combining method is presented for the optimal I/Q combining. And the arctangent and principal component combining methods using covariance matrix of I and Q channels are presented for the optimal I/Q combining in case of PSK. In order to analyze the performance of suggested methods, the selection diversity and the optimal combining methods are compared. According to analysis and simulation results, the optimal combining methods have a maximum 3 dB SNR enhancement than selection diversity.

A New Selected Mapping Scheme without Side Information Using Cross-Correlation (상호 상관을 이용한 부가정보가 필요 없는 Selected Mapping 수신방법 제안)

  • Lee, Jong-keun;Chang, Dae-ig
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.4
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    • pp.739-746
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    • 2017
  • Orthogonal frequency division multiplexing(OFDM) systems have many advantages. However, OFDM systems are much affected by a nonlinear distortion because those systems have a high peak to average power ratio(PAPR) value. A selected mapping technology was suggested to reduce a PAPR value. The technology does not have data loss but receivers need side information to know modified phase sequence. Therefore, side information causes decreased a transmission efficiency. In this paper, we suggest a blind SLM receiver using a cross correlation technology. This receiver does not require side information. The proposed blind SLM receiver calculates sums of cross-correlation between transmitted pilot signals multiplied by each phase sequence and received pilot signals. So, this receiver detects side information which has a maximum sum cross-correlation value. We compared our proposed SLM receiver to a conventional blind SLM receiver through bit error rate(BER) and side information error rate(SIER) performances. Simulation results show that the proposed SLM receiver has improved BER and SIER performances than the conventional SLM receiver.

Efficient Migration of Service Agent in P-Grid Environments based-on Mobile Agent (이동에이전트 기반의 P-그리드 환경에서 서비스 에이전트의 효율적인 이주기법)

  • Kook, Youn-Gyou;Uem, Young-Hyun;Jung, Gye-Dong;Chio, Yung-Geun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.131-134
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    • 2005
  • This paper describes the efficient peer-to-peer migration method of Grid service agent on the mobile agent based P-Grid. The migration mechanism for transmitting service agent upon the service request is based on the peer's logic network topology. The network topologies that this system uses are organized as star topology, ring topology and tree topology, and agents are migrated by the master/slave method and serial/parallel method. The migration method of services is chosen based on the execution range and characteristic of the requested service. Also, the entire execution time of service is affected by the performance of peer that is a part of network topology, and the migration order, Therefore, the system monitors the performance of peers, and determines the migration priority based on analyzing and learning history. The system can reduce service execution time efficiently with decisions of migration method for service agent and priority of peers.

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Fabrication of the grating array using computer generated phase mask (Computer generated phase mask를 이용한 격자 array 제작)

  • 원형식;김상인;박선택;송석호;오차환;김필수
    • Proceedings of the Optical Society of Korea Conference
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    • 2001.02a
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    • pp.158-159
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    • 2001
  • 파장분할다중 방식에서 필요로 하는 격자들 간의 격자주기 차이는 1nm이하를 요구한다. 따라서, 하나의 위상형 마스크로 서로 다른 주기의 격자를 동시에 제작하려면 하나의 위상형 마스크 패턴들 간에도 nm 정도의 차이를 갖는 미세한 패턴이 있어야 한다. 그러나, 일반적으로 마스크를 제작하는데 이용되는 장비인 전자빔 묘화장치(electron-beam lithographic system)의 분해능은 수십 nm이므로, 그러한 nm 정도의 정확도로서 조합된 마스크 패턴들을 만드는 것은 매우 어렵다. (중략)

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121.15MHz Frequency Synthesizers using Multi-phase DLL-based Phase Selector and Fractional-N PLL (다중위상 지연고정루프 기반의 위상 선택기와 분수 분주형 위상고정루프를 이용하는 121.15 MHz 주파수 합성기)

  • Lee, Seung-Yong;Lee, Pil-Ho;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.10
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    • pp.2409-2418
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    • 2013
  • Two frequency synthesizers are proposed to generate a clock for a sub-sampler of an on-chip oscilloscope in this paper. These proposed frequency synthesizers are designed by using a multi-phase delayed-locked loop (DLL)-based phase selector and a fractional-N phase-locked loop (PLL), and they are analyzed by comparing simulation results of each frequency synthesizer. Two proposed frequency synthesizers are designed using a 65-nm CMOS process with a 1V supply and output the clock with the frequency of 121.15 MHz when the frequency of an input clock is 125 MHz. The designed frequency synthesizer using a multi-phase DLL-based phase selector has the area of 0.167 $mm^2$ and the peak-to-peak jitter performance of 2.88 ps when it consumes the power of 4.75 mW. The designed frequency synthesizer using a fractional-N PLL has the area of 0.662 $mm^2$ and the peak-to-peak jitter performance of 7.2 ps when it consumes the power of 1.16 mW.

2.4kbps Speech Coding Algorithm Using the Sinusoidal Model (정현파 모델을 이용한 2.4kbps 음성부호화 알고리즘)

  • 백성기;배건성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3A
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    • pp.196-204
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    • 2002
  • The Sinusoidal Transform Coding(STC) is a vocoding scheme based on a sinusoidal model of a speech signal. The low bit-rate speech coding based on sinusoidal model is a method that models and synthesizes speech with fundamental frequency and its harmonic elements, spectral envelope and phase in the frequency region. In this paper, we propose the 2.4kbps low-rate speech coding algorithm using the sinusoidal model of a speech signal. In the proposed coder, the pitch frequency is estimated by choosing the frequency that makes least mean squared error between synthetic speech with all spectrum peaks and speech synthesized with chosen frequency and its harmonics. The spectral envelope is estimated using SEEVOC(Spectral Envelope Estimation VOCoder) algorithm and the discrete all-pole model. The phase information is obtained using the time of pitch pulse occurrence, i.e., the onset time, as well as the phase of the vocal tract system. Experimental results show that the synthetic speech preserves both the formant and phase information of the original speech very well. The performance of the coder has been evaluated in terms of the MOS test based on informal listening tests, and it achieved over the MOS score of 3.1.