• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2008.04a
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• pp.317-320
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• 2008

본 논문에서는 Type-1 퍼지 논리 시스템과 Type-2 퍼지 논리 시스템을 설계하고, 불확실한 정보를 갖는 입력 데이터에 대하여 각각의 성능을 비교한다. Type-1 퍼지 논리 시스템은 외부잡음에 민감한 단점을 가지고 있는 반면, Type-2 퍼지 논리 시스템은 불확실한 정보를 잘 표현할 수 있으며 효율적으로 취급한다. 따라서 Type-2 퍼지 논리 시스템을 이용하여 이러한 단점을 극복하고자 2가지의 모델을 설계한다. 첫 번째 모델은 규칙의 전 ${\cdot}$ 후반부가 불확실성을 표현 할 수 없는 Type-1 퍼지 집합으로 구성된 Type-1 퍼지 논리 시스템을 설계한다. 두 번째는 규칙 후반부만 Type-2 퍼지 집합으로 구성한 두가지의 Type-2 퍼지 논리 시스템을 설계한다. 여기서 규칙 전반부의 입력 공간 분할에는 Min-Max 방법의 균등분할을 사용하고, 규칙 후반부 멤버쉽 함수의 중심 결정에는 입자 군집 최적화(Particle Swarm Optimization) 알고리즘을 사용하여 동정한다. 또한 입력 데이터에 인위적으로 가하는 노이즈의 정도에 따른 각각 모델의 성능을 비교한다. 마지막으로 비선형 모델 평가에 주로 사용되는 가스로 시계열 데이터를 제안된 모델에 적용하고, 실험을 통하여 불확실한 정보를 다루기에 Type-1 퍼지 논리 시스템 보다 Type-2 퍼지 논리 시스템이 효율적이라는 것을 보인다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.22 no.3
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• pp.234-241
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• 2021

By recognizing the importance of demand forecasting, the military is conducting many studies to improve the prediction accuracy for repair parts. Demand forecasting for repair parts is becoming a very important factor in budgeting and equipment availability. On the other hand, the demand for intermittent repair parts that have not constant sizes and intervals with the time series model currently used in the military is difficult to predict. This paper proposes a method to improve the prediction accuracy for intermittent repair parts of the Patriot. The authors collected intermittent repair parts data by classifying the demand types of 701 repair parts from 2013 to 2019. The temperature and operating time identified as external factors that can affect the failure were selected as input variables. The prediction accuracy was measured using both time series models and data mining models. As a result, the prediction accuracy of the data mining models was higher than that of the time series models, and the multilayer perceptron model showed the best performance.

• Journal of the Korea Society of Computer and Information
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• v.17 no.3
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• pp.11-25
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• 2012

We present the method to infer Context-Free Grammars by applying genetic algorithm to the Binary Third-order Recurrent Neural Networks(BTRNN). BTRNN is a multiple-layered architecture of recurrent neural networks, each of which is corresponding to an input symbol, and is combined with external stack. All parameters of BTRNN are represented as binary numbers and each state transition is performed with any stack operation simultaneously. We apply Genetic Algorithm to BTRNN chromosomes and obtain the optimal BTRNN inferring context-free grammar of positive and negative input patterns. This proposed method infers BTRNN, which includes the number of its states equal to or less than those of existing methods of Discrete Recurrent Neural Networks, with less examples and less learning trials. Also BTRNN is superior to the recent method of chromosomes representing grammars at recognition time complexity because of performing deterministic state transitions and stack operations at parsing process. If the number of non-terminals is p, the number of terminals q, the length of an input string k, and the max number of BTRNN states m, the parallel processing time is O(k) and the sequential processing time is O(km).

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.96.1-96.1
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• 2010

전기차량용 차량제어기는 차량 전체의 구동 전략과 브레이크 시의 회생제동, 고전압 배터리의 SOC management 등을 제어하는 역할을 한다. 엑셀 페달 및 브레이크 페달의 신호를 입력 받아 운전자의 주행의지를 받아 들이고, 차량의 각종 제어기들과 CAN 통신을 통하여 필요한 정보들을 송수신한다. 이러한 입/출력 동작을 통하여 차량 전체의 구동전략을 세우고 각종 제어기들에게 주행에 필요한 정보를 전달한다. MCU(Main Control Unit)로는 32bit micro-controller 이 적용되었으며, 열충격과 고온동작 내구 등의 환경시험 및 전자기파 적합성 시험등을 통해 외부환경 변화에도 요구 성능을 만족함을 확인하였다. 이러한 성공적인 개발을 통해 2011년 초 시범양산되는 현대기아자동차의 BLUE ON 에 양산적용될 예정이라는 데에 의의가 있다.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.1824-1825
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• 2006

항공기, 차량, 유도탄 등과 같은 동적인 플랫폼에서 표적을 추적하기 위해서는 시선을 안정화하는 외부의 추적루프와 내부의 속도 루프를 포함하는 서보 구조가 필요하다. 본 논문에서는 내부의 속도 루프인 안정화 루프에 큰 입력 전압이 인가되었을 때 구동기(Actuator) 포화 현상에 의해서 공간 안정화 루프 성능이 나빠지지 않게 와인드업 방지(Anti-windup) 기능을 가진 디지털 비례적분(Proportional Integral, PI) 제어기를 설계한다. 디지털 와인드업 방지 비례적분 제어기는 일반적으로 SISO 시스템 설계를 위한 방법으로 와인드업 방지 기능을 가진 R, S, T 다항식으로 표현되는 입출력 형태의 제어기를 이용하여 설계하였다. 설계된 제어기는 모델링에 의한 시뮬레이션 결과와 실험결과를 통해 성능을 분석하였다.

• Journal of the Korean GEO-environmental Society
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• v.24 no.9
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• pp.41-46
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• 2023

Numerical analysis of frost heave is challenging due to the influence of soil and environmental factors. Thermo-hydromechanical coupled analysis relies heavily on excessive input variables and primarily focuses on validating clayey soils, so it is limited to frost susceptible silty soils. An empirical approach based on thermodynamics offers relatively simple frost heave analysis and the advantage of linking constitutive equations with frost heave to enable geomechanical interpretations. In this paper, we introduce an empirical numerical model using the Segregation Potential (SP) and evaluate reliability through comparative analysis with experimental results of frost susceptible silty soils. While the SP model enables frost heave analysis for the given silty soils, further investigation on various silty soils is necessary to gather data on key input variables.

• Fire Science and Engineering
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• v.24 no.2
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• pp.106-113
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• 2010

Fire characteristics can be analyzed more realistically by using more accurate material properties related to the fire dynamics and one way to acquire these fire properties is to use one of the inverse property analyses. In this study the genetic algorithm which is frequently applied for the inverse heat transfer problems is selected to demonstrate the procedure of obtaining fire properties of the solid charring material with relatively simple chemical structure. The thermal decomposition on the surface of the test plate is occurred by receiving the radiative energy from external heat sources, and in this process the heat transfer through the test plate can be simplified by an unsteady 1-D problem. The inverse property analysis based on the genetic algorithm is then applied for the estimation of the properties related to the reaction pyrolysis. The input parameters for the analysis are the surface temperature and mass loss rate of the char plate which are determined from the unsteady 1-D analysis with a givenset of 8 properties. The estimated properties using the inverse analysis based on the genetic algorithm show acceptable agreements with the input properties used to obtain the surface temperature and mass loss rate with errors between 1.8% for the specific heat of the virgin material and 151% for the specific heat of the charred material.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.4
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• pp.393-400
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• 2003

This paper deals with the design and manufacturing technique of EQM(Engineering Qualification Model) of input multiplexer(IMUX) for the Ku-band satellite transponder. Channel dropping method by circulator chain structure is adopted for demultiplexing each channel. External equalizers are attached behind channel filters fur reduction of group delay variation and amplitude variation simultaneously. Both channel filters and equalizers adopted dual-mode technique in design f3r mass and volume reduction. Channel filters are designed to have 8-pole elliptic response and equalizers to be of 2-pole reflection type. For good temperature stability characteristics, INVAR36 material is used for channel filters and external equalizers. Vibration test, Thermal Vacuum Test, and EMC test have been performed on input multiplexer and it is shown to be suitable for Ku-band satellite transponder.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7A
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• pp.683-694
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• 2002

In this paper, a digital image compression codec using 2D DWT(Discrete Wavelet Transform) is designed using the FPGA technology for real time operation The implemented image compression codec using wavelet decomposition consists of a wavelet kernel part for wavelet filtering process, a quantizer/huffman coder for quantization and huffman encoding of wavelet coefficients, a memory controller for interface with external memories, a input interface to process image pixels from A/D converter, a output interface for reconstructing huffman codes, which has irregular bit size, into 32-bit data having regular size data, a memory-kernel buffer to arrage data for real time process, a PCI interface part, and some modules for setting timing between each modules. Since the memory mapping method which converts read process of column-direction into read process of the row-direction is used, the read process in the vertical-direction wavelet decomposition is very efficiently processed. Global operation of wavelet codec is synchronized with the field signal of A/D converter. The global hardware process pipeline operation as the unit of field and each field and each field operation is classified as decomposition levels of wavelet transform. The implemented hardware used FPGA hardware resource of 11119(45%) LAB and 28352(9％) ESB in FPGA device of APEX20KC EP20k600CB652-7 and mapped into one FPGA without additional external logic. Also it can process 33 frames(66 fields) per second, so real-time image compression is possible.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.27-35
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• 2008

This work proposes a 14b 150MS/s 0.13um CMOS ADC for SDR systems requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC employs a calibration-free four-step pipeline architecture optimizing the scaling factor for the input trans-conductance of amplifiers and the sampling capacitance in each stage to minimize thermal noise effects and power consumption at the target resolution and sampling rate. A signal- insensitive 3-D fully symmetric layout achieves a 14b level resolution by reducing a capacitor mismatch of three MDACs. The proposed supply- and temperature- insensitive current and voltage references with on-chip RC filters minimizing the effect of switching noise are implemented with off-chip C filters. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates a measured DNL and INL within 0.81LSB and 2.83LSB, at 14b, respectively. The ADC shows a maximum SNDR of 64dB and 61dB and a maximum SFDR of 71dB and 70dB at 120MS/s and 150MS/s, respectively. The ADC with an active die area of $2.0mm^2$ consumes 140mW at 150MS/s and 1.2V.