• Title/Summary/Keyword: 영상 화질

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Fast Intra-Mode Decision for H.264/AVC using Inverse Tree-Structure (H.264/AVC 표준에서 역트리 구조를 이용하여 고속으로 화면내 모드를 결정하는 방법)

  • Ko, Hyun-Suk;Yoo, Ki-Won;Seo, Jung-Dong;Sohn, Kwang-Hoon
    • Journal of Broadcast Engineering
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    • v.13 no.3
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    • pp.310-318
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    • 2008
  • The H.264/AVC standard achieves higher coding efficiency than previous video coding standards with the rate-distortion optimization (RDO) technique which selects the best coding mode and reference frame for each macroblock. As a result, the complexity of the encoder have been significantly increased. In this paper, a fast intra-mode decision algorithm is proposed to reduce the computational load of intra-mode search, which is based on the inverse tree-structure edge prediction algorithm. First, we obtained the dominant edge for each $4{\times}4$ block from local edge information, then the RDO process is only performed by the mode which corresponds to dominant edge direction. Then, for the $8{\times}8$ (or $16{\times}16$) block stage, the dominant edge is calculated from its four $4{\times}4$ (or $16{\times}16$) blocks' dominant edges without additional calculation and the RDO process is also performed by the mode which is related to dominant edge direction. Experimental results show that proposed scheme can significantly improve the speed of the intra prediction with a negligible loss in the peak signal to noise ratio (PSNR) and a little increase of bits.

An Early Termination Algorithm for Efficient CU Splitting in HEVC (HEVC 고속 부호화를 위한 효율적인 CU 분할 조기 결정 알고리즘)

  • Goswami, Kalyan;Kim, Byung-Gyu;Jun, DongSan;Jung, SoonHeung;Seok, JinWook;Kim, YounHee;Choi, Jin Soo
    • Journal of Broadcast Engineering
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    • v.18 no.2
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    • pp.271-282
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    • 2013
  • Recently, ITU-T/VCEG and ISO/IEC MPEG have started a new joint standardization activity on video coding, called High Efficiency Video Coding (HEVC). This new standard gives significant improvement in terms of picture quality for high resolution video. The main challenge in this upcoming standard is the time complexity. In this paper we have focused on CU splitting algorithm. We have proposed a novel algorithm which can terminate the CU splitting process early based on the RD cost of the parent and current level and the motion vector value of the current CU. Experimental result shows that our proposed algorithm gives on average more than about 10% decrement in time over ECU [8] with on average 1.78% of BD loss on the original.

A study on Quality Control of Mammography Equipment in the Gwang-Ju (일부지역 유방 촬영 장비의 정도관리 실태조사 연구)

  • Shin, Ji-Yun;Lee, Sang-Bock;Jin, Gye-Hwan;Lee, Sam-Yeol;Lee, Jun-Haeng
    • Journal of the Korean Society of Radiology
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    • v.2 no.4
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    • pp.11-25
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    • 2008
  • As breast cancer shows the highest incidence among women's cancers, the use of mammography is also increasing as a screening test. Mammography should produce high-quality images for accurate diagnosis. For this, it is necessary to manage the performance and image quality of mammography. Thus, in order to investigate quality control, the present study conducted a questionnaire survey of 37 hospitals registered as breast cancer medical examination centers in Gwang-Ju, concerning their quality control of mammography. In the results of surveying the characteristics of apparatus use for mammography, many respondents did not know about the equipment that they were using. Of the hospitals, 19 (49%) were using film, 19 (49%) CR, and 1 DR. In the results of asking how to do quality control, only 38% answered that they inspected according to the manual. In addition, all the surveyed hospitals had specialized agencies do quality control for them. As to the reason for using agencies, 65% mentioned limitations in personnel, time, distance, etc, and 44% mentioned the absence of machines and materials. These results suggest that quality control is being performed perfunctorily, as well as passively and indifferently as it relies on specialized agencies. Accordingly, it is necessary to provide regular education for enhancing people's perception of quality control and to perform quality control adequately in the presence of Radiologist.

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Business Model of Data Service in Broadcasting and Communication Convergence (유비쿼터스시대 방송과 통신의 컨버전스 데이터 서비스 비즈니스 모델)

  • Jung, Chang-Duk;Lee, Ji-Eun
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2006.11a
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    • pp.245-249
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    • 2006
  • 디지털 컨버전스와 유비쿼터스 시대의 시작은 디지털 미디어 기술의 발전과 방송 통신 사업의 컨버전스를 가속화 시켰으며, 그 결과로DMB, WCDHA, Wibro, IP-TV, HSDPA 등의 새로운 형태의 차세대 제품과 서비스들이 뉴미디어 매체의 핵심으로 등장하고 있다. 국내에서 방송 통신의 컨버전스의 빠른 진행은 세계 최초로 디지털 멀티미디어 방송(DMB) 서비스 시작을 가능하게 하였다. DMB 서비스는 멀티미디어 서비스가 핵심이다. DMB 데이터 서비스인 Broadcasting Website Service(BWS)는 현재 지상파 DMB방송 사업자인 KBS, MBC, SBS, YTNDMB가 본방송 준비 막바지 단계이며, 삼성 전자와 LG전자를 비롯한 단말기 개발사들도 데이터 서비스를 위한 제품 출시에 서두르고 있는 등 DMB 산업의 활성화의 주역이 될 것으로 예상된다. DMB의 데이터 서비스는 뉴스, 날씨, 프로그램 정보 등의 단순 정보보기 수준에 그치지 않고, 리턴 채널을 이용한 양방향 서비스와, SMS, 전화걸기 등 휴대전화 단말의 고유기능과의 연계를 통한 다양한 서비스도 선보일 것이다. 더 나아가 향후 T-Commerce와 개인 광고 등 새로운 비즈니스 모델과 사업영역으로 확산시켜 나갈 수 있을 것이다. 그러나, 아직까지 DMB와 데이터 서비스는 초기단계로서, 표준 기술의 규격 작업, 이론적 논의들, 관련 사업자들의 비즈니스 준비 등에서 검토되어, 실제 사용자들을 대상으로한 연구 분석이 이루어 지지 않았다는 연구의 한계를 가지고 있다. 본격적으로 방송, 통신 컨버전스 데이터 서비스가 시작되면서, 사용자들에 초점을 맞춘 많은 연구가 이루어지길 바라며, 이러한 연구의 분석를 통해 또 다른 새로운 서비스와 비즈니스 기회의 창출을 기대해 본다.여 RD(Rate Distortion) 최적화 기반 모드 결정을 빨리 완료함으로써 고속 프레임간 모드 결정을 가능하게 한다. 제안된 방법은 프레임 간 모드 결정을 고속화함으로써 스케일러블 비디오 부호화기의 연산량과 복잡도를 최대 57%감소시킨다. 그러나 연산량 감소에 따른 비트율의 증가나 화질의 열화는 최대 1.74% 비트율 증가 및 0.08dB PSNR 감소로 무시할 정도로 작다., 반드시 이에 대한 검증이 필요함을 알 수 있었다. 현지관측에 비해 막대한 비용과 시간을 절약할 수 있는 위성영상해석방법을 이용한 방법은 해양수질파악이 가능할 것으로 판단되며, GIS를 이용하여 다양하고 복잡한 자료를 데이터베이스화함으로써 가시화하고, 이를 기초로 공간분석을 실시함으로써 환경요소별 공간분포에 대한 파악을 통해 수치모형실험을 이용한 각종 환경영향의 평가 및 예측을 위한 기초자료로 이용이 가능할 것으로 사료된다.염총량관리 기본계획 시 구축된 모형 매개변수를 바탕으로 분석을 수행하였다. 일차오차분석을 이용하여 수리매개변수와 수질매개변수의 수질항목별 상대적 기여도를 파악해 본 결과, 수리매개변수는 DO, BOD, 유기질소, 유기인 모든 항목에 일정 정도의 상대적 기여도를 가지고 있는 것을 알 수 있었다. 이로부터 수질 모형의 적용 시 수리 매개변수 또한 수질 매개변수의 추정 시와 같이 보다 세심한 주의를 기울여 추정할 필요가 있을 것으로 판단된다.변화와 기흉 발생과의 인과관계를 확인하고 좀 더 구체화하기 위한 연구가 필요할 것이다.게 이루어질 수 있을 것으로 기대된다.는 초과수익률이 상승하지만, 이후로는 감소하므로, 반전거래전략을 활용하는 경우 주식투자기간은 24개월이하의 중단기가 적합함을 발견하였다. 이상의 행태적 측면과 투자성과측면의 실증결과를 통하여 한국주식시장에

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A Real-time H.264 to MPEG-2 Transcoding for Ship to Shore Communication (선박-육지간 통신을 위한 실시간 H.264 to MPEG-2 트랜스코딩)

  • Son, Nam-Rye;Jeong, Min-A;Lee, Seong-Ro
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.48 no.1
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    • pp.90-102
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    • 2011
  • Recently, the grade of users using wireless communication services which transmits and re-transmits to the signal via the broadcasting satellite have a variety. However the ships not preparing of H.264 standard devices should not received the realtime data because the broadcasting stations have transmitted the compressed video data through the satellite communication. Therefore this paper proposes H.264 to MPEG-2 transcoding for the ships using MPEG-2 devices. Proposed method improves a speed and object quality in H.264 to MPEG-2 transcoding by analysis features of macroblock modes in H.264. In the Intra mode of P-frame, it proposes new method by computing coincidence proportion after comparing of Intra mode methods of H.264 and MPEG-2. In the Inter mode, it proposes a PMV(predictive motion vector) considering movement of motion vectors in H.264 decoder. we reuses a PMV directly as like the final MV in MPEG-2 encoder and refinements the MV after coincidence ratio comparing of variable motion vectors of H.264 and these of MPEG-2. The experimental results from proposed method show a considerable reduction in processing time, as much as 70% and 67% respectively, with a small objective quality reduction in PSNR.

Development of the Hippocampal Learning Algorithm Using Associate Memory and Modulator of Neural Weight (연상기억과 뉴런 연결강도 모듈레이터를 이용한 해마 학습 알고리즘 개발)

  • Oh Sun-Moon;Kang Dae-Seong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.43 no.4 s.310
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    • pp.37-45
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    • 2006
  • In this paper, we propose the development of MHLA(Modulatory Hippocampus Learning Algorithm) which remodel a principle of brain of hippocampus. Hippocampus takes charge auto-associative memory and controlling functions of long-term or short-term memory strengthening. We organize auto-associative memory based 3 steps system(DG, CA3, CAl) and improve speed of learning by addition of modulator to long-term memory learning. In hippocampal system, according to the 3 steps order, information applies statistical deviation on Dentate Gyrus region and is labelled to responsive pattern by adjustment of a good impression. In CA3 region, pattern is reorganized by auto-associative memory. In CAI region, convergence of connection weight which is used long-term memory is learned fast by neural networks which is applied modulator. To measure performance of MHLA, PCA(Principal Component Analysis) is applied to face images which are classified by pose, expression and picture quality. Next, we calculate feature vectors and learn by MHLA. Finally, we confirm cognitive rate. The results of experiments, we can compare a proposed method of other methods, and we can confirm that the proposed method is superior to the existing method.

Hardware Design of In-loop Filter for High Performance HEVC Encoder (고성능 HEVC 부호기를 위한 루프 내 필터 하드웨어 설계)

  • Park, Seungyong;Im, Junseong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.335-342
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    • 2016
  • This paper proposes efficient hardware structure of in-loop filter for a high-performance HEVC (High Efficiency Video Coding) encoder. HEVC uses in-loop filter consisting of deblocking filter and SAO (Sample Adaptive Offset) to improve the picture quality in a reconstructed image due to a quantization error. However, in-loop filter causes an increase in complexity due to the additional encoder and decoder operations. A proposed in-loop filter is implemented as a three-stage pipeline to perform the deblocking filtering and SAO operation with a reduced number of cycles. The proposed deblocking filter is also implemented as a six-stage pipeline to improve efficiency and performs a new filtering order for efficient memory architecture. The proposed SAO processes six pixels parallelly at a time to reduce execution cycles. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 131K logic gates in TSMC $0.13{\mu}m$ process. At 164MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 60fps in real time.

Video Streaming Receiver with Token Bucket Automatic Parameter Setting Scheme by Video Information File needing Successful Acknowledge Character (성공적인 확인응답이 필요한 비디오 정보 파일에 의한 토큰버킷 자동 파라메타 설정 기법을 가진 비디오 스트리밍 수신기)

  • Lee, Hyun-no;Kim, Dong-hoi;Nam, Boo-hee;Park, Seung-young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.10
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    • pp.1976-1985
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    • 2015
  • The amount of packets in palyout buffer of video streaming receiver can be changed by network condition, and saturated and exhausted by the delay and jitter. Especially, if the amount of incoming video traffic exceeds the maximum allowed playout buffer, buffer overflow problem can be generated. It makes the deterioration of video image and the discontinuity of playout by skip phenomenon. Also, if the incoming packets are delayed by network confusion, the stop phenomenon of video image is made by buffering due to buffer underflow problem. To solve these problems, this paper proposes the video streaming receiver with token bucket scheme which automatically establishes the important parameters like token generation rate r and bucket maximum capacity c adapting to the pattern of video packets. The simulation results using network simulator-2 (NS-2) and joint scalable video model (JSVM) show that the proposed token bucket scheme with automatic establishment parameter provides better performance than the existing token bucket scheme with manual establishment parameter in terms of the generation number of overflow and underflow, packer loss rate, and peak signal to noise ratio (PSNR) in three test video sequences.

Distributed Multi-view Video Coding Based on Illumination Compensation (조명보상 기반 분산 다시점 비디오 코딩)

  • Park, Sea-Nae;Sim, Dong-Gyu;Jeon, Byeung-Woo
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.6
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    • pp.17-26
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    • 2008
  • In this paper, we propose a distributed multi-view video coding method employing illumination compensation for multi-view video coding. Distributed multi-view video coding (DMVC) methods can be classified either into a temporal or an inter-view interpolation-based ones according to ways to generate side information. DMVC with inter-view interpolation utilizes characteristics of multi-view videos to improve coding efficiency of the DMVC by using side information based on the inter-view interpolation. However, mismatch of camera parameters and illumination change between two views could bring about inaccurate side information generation. In this paper, a modified distributed multi-view coding method is presented by applying illumination compensation in generating the side information. In the proposed encoder system, in addition to parity bits for AC coefficients, DC coefficients are transmitted as well to the decoder side. By doing so, the decoder can generate more accurate side information by compensating illumination changes with the transmitted DC coefficients. We found that the proposed algorithm is $0.1{\sim}0.2\;dB$ better than the conventional algorithm that does not make use of illumination compensation.

Architecture design for speeding up Multi-Access Memory System(MAMS) (Multi-Access Memory System(MAMS)의 속도 향상을 위한 아키텍처 설계)

  • Ko, Kyung-sik;Kim, Jae Hee;Lee, S-Ra-El;Park, Jong Won
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.6
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    • pp.55-64
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    • 2017
  • High-capacity, high-definition image applications need to process considerable amounts of data at high speed. Accordingly, users of these applications demand a high-speed parallel execution system. To increase the speed of a parallel execution system, Park (2004) proposed a technique, called MAMS (Multi-Access Memory System), to access data in several execution units without the conflict of parallel processing memories. Since then, many studies on MAMS have been conducted, furthering the technique to MAMS-PP16 and MAMS-PP64, among others. As a memory architecture for parallel processing, MAMS must be constructed in one chip; therefore, a method to achieve the identical functionality as the existing MAMS while minimizing the architecture needs to be studied. This study proposes a method of miniaturizing the MAMS architecture in which the architectures of the ACR (Address Calculation and Routing) circuit and MMS (Memory Module Selection) circuit, which deliver data in memories to parallel execution units (PEs), do not use the MMS circuit, but are constructed as one shift and conditional statements whose number is the same as that of memory modules inside the ACR circuit. To verify the performance of the realized architecture, the study conducted the processing time of the proposed MAMS-PP64 through an image correlation test, the results of which demonstrated that the ratio of the image correlation from the proposed architecture was improved by 1.05 on average.