• Title/Summary/Keyword: 연산 효율

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Voice-to-voice conversion using transformer network (Transformer 네트워크를 이용한 음성신호 변환)

  • Kim, June-Woo;Jung, Ho-Young
    • Phonetics and Speech Sciences
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    • v.12 no.3
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    • pp.55-63
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    • 2020
  • Voice conversion can be applied to various voice processing applications. It can also play an important role in data augmentation for speech recognition. The conventional method uses the architecture of voice conversion with speech synthesis, with Mel filter bank as the main parameter. Mel filter bank is well-suited for quick computation of neural networks but cannot be converted into a high-quality waveform without the aid of a vocoder. Further, it is not effective in terms of obtaining data for speech recognition. In this paper, we focus on performing voice-to-voice conversion using only the raw spectrum. We propose a deep learning model based on the transformer network, which quickly learns the voice conversion properties using an attention mechanism between source and target spectral components. The experiments were performed on TIDIGITS data, a series of numbers spoken by an English speaker. The conversion voices were evaluated for naturalness and similarity using mean opinion score (MOS) obtained from 30 participants. Our final results yielded 3.52±0.22 for naturalness and 3.89±0.19 for similarity.

Object Detection Method in Sea Environment Using Fast Region Merge Algorithm (해양환경에서 고속 영역 병합 알고리즘을 이용한 물표 탐지 기법)

  • Jeong, Jong-Myeon;Park, Gyei-Kark
    • Journal of the Korean Institute of Intelligent Systems
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    • v.22 no.5
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    • pp.610-616
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    • 2012
  • In this paper, we present a method to detect an object such as ship, rock and buoy from sea IR image for the safety navigation. To this end, we do the image smoothing first and the apply watershed algorithm to segment image into subregions. Since watershed algorithm almost always produces over-segmented regions, it requires posterior merging process to get meaningful segmented regions. We propose an efficient merger algorithm that requires only two times of direct access to the pixels regardless of the number of regions. Also by analyzing IR image obtained from sea environments, we could find out that most horizontal edge come out from object regions. For the given input IR image we extract horizontal edge and eliminate isolated edges produced from background and noises by adopting morphological operator. Among the segmented regions, the regions that have horizontal edges are extracted as final results. Experimental results show the adequacy of the proposed method.

Development and Speed Comparison of Convolutional Neural Network Using CUDA (CUDA를 이용한 Convolutional Neural Network의 구현 및 속도 비교)

  • Ki, Cheol-min;Cho, Tai-Hoon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.05a
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    • pp.335-338
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    • 2017
  • Currently Artificial Inteligence and Deep Learning are social issues, and These technologies are applied to various fields. A good method among the various algorithms in Artificial Inteligence is Convolutional Neural Network. Convolutional Neural Network is a form that adds convolution layers that extracts features by convolution operation on a general neural network method. If you use Convolutional Neural Network as small amount of data, or if the structure of layers is not complicated, you don't have to pay attention to speed. But the learning time is long as the size of the learning data is large and the structure of layers is complicated. So, GPU-based parallel processing is a lot. In this paper, we developed Convolutional Neural Network using CUDA and Learning speed is faster and more efficient than the method using the CPU.

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A Cache Consistency Control for B-Tree Indices in a Database Sharing System (데이타베이스 공유 시스템에서 B-트리 인덱스를 위한 캐쉬 일관성 제어)

  • On, Gyeong-O;Jo, Haeng-Rae
    • The KIPS Transactions:PartD
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    • v.8D no.5
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    • pp.593-604
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    • 2001
  • A database sharing system (DSS) refers to a system for high performance transaction processing. In the DSS, the processing nodes are coupled via a high speed network and share a common database at the disk level. Each node has a local memory and a separate copy of operating system. To reduce the number of disk accesses, the node caches data pages and index pages in its memory buffer. In general, B-tree index pages are accessed more often and thus cached at more processing nodes, than their corresponding data pages. There are also complicated operations in the B-tree such as Fetch, Fetch Next, Insertion and Deletion. Therefore, an efficient cache consistency scheme supporting high level concurrency is required. In this paper, we propose cache consistency schemes using identifiers of index pages and page_LSN of leaf page. The propose schemes can improve the system throughput by reducing the required message traffic between nodes and index re-traversal.

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Allocation algorithm applied building addressing value the coordinate in Smart Grid Environments (스마트그리드 환경에서 좌표 값을 적용한 빌딩 주소 할당 방법)

  • Im, Song-Bin;Oh, Young-Hwan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.1C
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    • pp.45-53
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    • 2012
  • In this paper, we proposed the efficient addressing scheme for improving the performance of routing algorithm by using ZigBee in Smart Grid environment. A distributed address allocation scheme used an existing algorithm that has wasted in address space. Therefore proposing x, y and z coordinate axes from divided address space of 16 bit to solve this problems. Each node was reduced not only bitwise but also multi hop using the coordinate axes while routing than $Cskip$ algorithm. I compared the performance between the standard and the proposed mechanism through the numerical analysis. Simulation verified performance about decrease averaging multi hop count that compare proposing algorithm and another. The numerical analysis results show that proposed algorithm reduced the multi hop better than ZigBee distributed address assignmen.

Development and Efficiency Evaluation of Metropolis GA for the Structural Optimization (구조 최적화를 위한 Metropolis 유전자 알고리즘을 개발과 호율성 평가)

  • Park Kyun-Bin;Kim Jeong-Tae;Na Won-Bae;Ryu Yeon-Sun
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.19 no.1 s.71
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    • pp.27-37
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    • 2006
  • A Metropolis genetic algorithm (MGA) is developed and applied for the structural design optimization. In MGA, favorable features of Metropolis criterion of simulated annealing (SA) are incorporated in the reproduction operations of simple genetic algorithm (SGA). This way, the MGA maintains the wide varieties of individuals and preserves the potential genetic information of early generations. Consequently, the proposed MGA alleviates the disadvantages of premature convergence to a local optimum in SGA and time consuming computation for the precise global optimum in SA. Performances and applicability of MGA are compared with those of conventional algorithms such as Holland's SGA, Krishnakumar's micro GA, and Kirkpatrick's SA. Typical numerical examples are used to evaluate the computational performances, the favorable features and applicability of MGA. The effects of population sizes and maximum generations are also evaluated for the performance reliability and robustness of MGA. From the theoretical evaluation and numerical experience, it is concluded that the proposed MGA Is a reliable and efficient tool for structural design optimization.

Application of the Preconditioned Conjugate Gradient Method to the Generalized Finite Element Method with Global-Local Enrichment Functions (전처리된 켤레구배법의 전체-국부 확장함수를 지닌 일반유한요소해석에의 응용)

  • Choi, Won-Jeong;Kim, Min-Sook;Kim, Dae-Jin;Lee, Young-Hak;Kim, Hee-Cheul
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.24 no.4
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    • pp.405-412
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    • 2011
  • This paper introduces the generalized finite element method with global-local enrichment functions using the preconditioned conjugate gradient method. The proposed methodology is able to generate enrichment functions for problems where limited a-priori knowledge on the solution is available and to utilize a preconditioner and initial guess of good quality with only small addition of computational cost. Thus, it is very effective to analyze problems where a complex behavior is locally exhibited. Several numerical experiments are performed to confirm its effectiveness and show that it is computationally more efficient than the analysis utilizing direct solvers such as Gauss elimination method.

A Study on the Industrial Applications of Quantum Information Processing and Communication (퀀텀정보통신기술의 산업적 응용가능성에 관한 연구)

  • Kwon, Moon-Ju;Kim, Richard C.S.;Park, Seong-Taek;Kim, Tae Ung
    • Journal of Digital Convergence
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    • v.11 no.7
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    • pp.173-184
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    • 2013
  • Quantum Information Processing and Communication, based on the physical laws of Quantum mechanics, exploits fundamentally new modes of computation and communication and holds the promise of immense computing power beyond the capabilities of any classical computer. In Quantum Information Processing, replacing bits with qubits, one makes two-state quantum systems that do not possess in general the definite values of 0 or 1 of classical bits, but rather are in a so-called. "coherent superposition", of the two. Full exploitation of this additional freedom implies that new processing devices need to be designed and implemented, and that a large scale quantum computer can in principle be built. New discoveries will enable a range of exciting new possibilities including: greatly improved sensors with potential impact for mineral exploration and improved medical imaging and a revolutionary new computational paradigm that will likely lead to the creation of computing devices capable of efficiently solving problems that cannot be solved on a classical computer. In short, Quantum computing is an economy game changer, with a potential of disrupting entire industries and creating new ones.

Shot Boundary Detection Algorithm by Compensating Pixel Brightness and Object Movement (화소 밝기와 객체 이동을 이용한 비디오 샷 경계 탐지 알고리즘)

  • Lee, Joon-Goo;Han, Ki-Sun;You, Byoung-Moon;Hwang, Doo-Sung
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.5
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    • pp.35-42
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    • 2013
  • Shot boundary detection is an essential step for efficient browsing, sorting, and classification of video data. Robust shot detection method should overcome the disturbances caused by pixel brightness and object movement between frames. In this paper, two shot boundary detection methods are presented to address these problem by using segmentation, object movement, and pixel brightness. The first method is based on the histogram that reflects object movements and the morphological dilation operation that considers pixel brightness. The second method uses the pixel brightness information of segmented and whole blocks between frames. Experiments on digitized video data of National Archive of Korea show that the proposed methods outperforms the existing pixel-based and histogram-based methods.

Hardware Design and Implementation of a Parallel Processor for High-Performance Multimedia Processing (고성능 멀티미디어 처리용 병렬프로세서 하드웨어 설계 및 구현)

  • Kim, Yong-Min;Hwang, Chul-Hee;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.5
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    • pp.1-11
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    • 2011
  • As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements (PEs) and operates on a 3-stage pipelining. Experimental results indicated that the proposed parallel processor outperforms conventional parallel processors in terms of performance. In addition, our proposed parallel processor outperforms commercial high-performance TI C6416 DSP in terms of performance (1.4-31.4x better) and energy efficiency (5.9-8.1x better) with same 130nm technology and 720 clock frequency. The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system.