• Proceedings of the Korea Information Processing Society Conference
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• 2002.11b
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• pp.1655-1658
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• 2002

본 논문은 최소한의 정보량을 가지고 높은 안전성을 제공하는 타원곡선을 이용한 전자 지불 프로토콜을 제안한다. 타원 곡선 공개키 암호 알고리즘의 이용은 지불과정에서 필요한 계산 속도를 빠르게 함으로써 실제로 지불 시스템을 구현하였을 때 사용자들에게 지불시스템의 효율적이고 편리함으로서 실제로 지불 시스템을 구현하였을 때 사용자들에게 지불시스템의 효율적이고 편리한 이용환경을 제공할 수 있고 타원 곡선 공개키 암호 알고리즘이 가지는 높은 안전성은 사용자들에게 지불시스템에 대한 신뢰성을 가지게 할 수 있다. 타원곡선 공개키 암호 알고리즘을 통하여 설계된 지불 시스템은 미래의 이동 컴퓨팅 환경에서도 효과적으로 사용될 수 있을 것이다.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1991.11a
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• pp.72-84
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• 1991

본 논문에서는 컴퓨터 통신에 적합한 공개 키 암호시스팀을 제안한다. 이 방식은 기존의 Knapsack 형래 암호시스템 보다 간단하면서 높은 안전성을 갖는다. 이 Knapsack 형태의 공개 키 암호시스팀은 다변수 다항식의 초증가한 근을 기초로 한 것으로 암호화와 복호화 앨고리듬의 타당성을 보였다. 또한 제안된 공개 키 암호시스팀의 안전성은 다변수 다항식 분해의 다양성, 각 다항식에서 초증가 특성을 만족하는 근을 얻기 위한 어려움, 그리고 평문과 암호문 관계의 모호성을 기반으로 하며 이를 기존의 Knapsack 암호시스팀과 비교분석 하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.05c
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• pp.2181-2184
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• 2003

전자상거래, Single Sign On, 전자문서교환 등 웹 기반의 사이버 교환이 급증하는 오늘날 상대방의 신뢰를 보증해 줄 수 있는 수단으로 인증서의 사용이 필수적이다. 인증서는 인증기관을 신뢰한다는 가정에서 사용되기 때문에 통신개체 사이에서 보다 정확한 인증이 필요하다. 본 논문에서는 공개키 기반구조에서 인증서를 사용하는 모든 암호시스템 분야에 응용될 수 있는 인증 및 키 복구 메커니즘을 설계하였다. 서버와 사용자간에 인증서를 기반으로 공개키 암호에 의한 인증과 세션 암호 키 분배, 그리고 응용 자원서버들과의 비밀통신에서 암호 키의 유실을 고려한 키 복구 지원 프로토콜을 제안하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.2
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• pp.338-343
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• 2006

This paper describes about the design concept and the architecture of an economic VPN system which can perform fast crypto operations with cheap cost. The essence of the proposed system architecture is consisting of the system with two companion chips dedicated to VPN: one chip is a multi-purpose network processor for security machine and the other is a crypto acceleration chip which encrypt and decrypt network packets in a high speed. This study also addresses about some realizations that is required for fast prototyping such as the porting of an operating system, the establishment of compiler tool chain, the implementation of device drivers and the design of IPSec security engine. Especially, the second chip supports the most time consuming block cipher algorithms including 3DES, AES, and SEED and its performance was evaluated.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.05c
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• pp.1945-1948
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• 2003

본 논문에서는 GSM 암호 시스템에 적용되는 메시지 암호 등을 위한 A5 스트림 암호를 개선하였다. 기존의 64비트 키 길이의 GSM 암호의 취약점을 보완하기 위해 키 길이를 두 배로 늘림으로서 키 수열을 복잡하게 하였고, 랜덤성, 주기 그리고 선형 복잡도 측면에서 분석하였다. 사용된 알고리즘은 C언어로 시뮬레이션 하였으며. 통계적 분석 기법을 통하여 개발 알고리즘의 출력 특성을 분석하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.136-141
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• 2006

The IEEE 802.1x can be using various user authentication mechanisms: One-Time Password, Certificate-Based TLS, Challenge/Response and Keberos through EAP(Extended Authentication Protocol). But, IEEE 802.1x also has vulnerabilities about the DoS, the session hijacking and the Man in the Middle attack due to the absence of AP authentication. In this paper, we propose a WLAN secure system which can offer a safety secure communication and a user authentications by intensified the vulnerability of spoofing and DoS attacks. The suppose system offers a safe secure communication because it offers sending message of integrity service and also it prevents DoS attack at authentication initial phase.

• The Transactions of the Korea Information Processing Society
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• v.7 no.8
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• pp.2421-2429
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• 2000

With the advance of wireless communications technology, mobile communications have become more convenient than ever. Nowadays, people can communicate with each other on any place at any time. However, because of the openness of wireless communications, the way to protect the privacy between communicating parties is becoming a very important issue. In this paper, we present a study on the authentication and message encryption algorithm to support roaming service to the GSM network. To propose an authentication and message encryption algorithm applicable to the GSM system, the security architecture of the GSM outlined in the GSM standard is briefly introduced. In the proposed cryptosystems we use a new hash function for user authentication and a stream cipher based on Linear Feedback Shift Register(LFSR) for message encryption and decryption. Moreover, each algorithm is programmed with C language and simulated on IBM-PC system and we analyze the randomness properties of the proposed algorithms by using statistical tests.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.778-784
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• 2012

A symmetric block cryptosystem uses an identical cryptographic key at encryption and decryption processes. HIGHT cipher algorithm is 64-bit block cryptographic technology for mobile device that was authorized as international standard by ISO/IEC on 2010. In this paper, block cipher HIGHT algorithm is designed using Verilog-HDL. Four modes of operation for block cipher such as ECB, CBC, OFB and CTR are supported. When continuous message blocks of fixed size are encrypted or decrypted, the desigend HIGHT core can process a 64-bit message block in every 34-clock cycle. The cryptographic processor designed in this paper operates at 144MHz on vertex chip of Xilinx, Inc. and the maximum throughput is 271Mbps. The designed cryptographic processor is applicable to security module of the areas such as PDA, smart card, internet banking and satellite broadcasting.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.10
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• pp.2181-2190
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• 1997

The synchronous stream cipher has the problem of synchronization loss by cycle slip. Synchronization loss make the state which sender and receiver can't communicate and it may make the receiving system disordered. To lessen the risk, we usually use a continuous resynchronization which achieve resynchronization at fixed timesteps by inserting synchronization pattern and session key. While we can get effectively resynchronizationby continuous resynchronization, there are some problems. In this paper, we proposed an adaptive resynchronization algorithm for cipher system using LAPB protocol. It is able to solve the problem of the continunous resynchronization.The proposed adaptive algorithm make resynchronization only in the case that the resynchronization is occurred by analyzing the address field of LAPB. It measure the receiving rate of the address field in the decesion duration. If the receiving rate is smaller than threshold value, it make resynchronization or not. By using adaptively resynchronization, it solves the problems of continunous resynchronization. When the proposed adaptive algorithm is applied to the synchronous stream cipher system which is used in X.25 packet network, it reduced the time for resynchronization by ten times. It means that 11.3% of total data for transmit is compressed.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.5
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• pp.95-105
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• 2002

This paper describes an efficient method to implement a hardware circuit of RSA public key cryptographic algorithm, which is important to public-key cryptographic system for an authentication, a key exchange and a digital signature. The RSA algorithm needs a modular exponential for its cryptographic operation, and the modular exponential operation is consists of repeated modular multiplication. In a numerous algorithm to compute a modular multiplication, the Montgomery algorithm is one of the most widely used algorithms for its conspicuous efficiency on hardware implementation. Over the past a few decades a considerable number of studies have been conducted on the efficient hardware design of modular multiplication for RSA cryptographic system. But many of those studies focused on the decrease of operating time for its higher performance. The most important thing to design a hardware circuit, which has a limit on a circuit area, is a trade off between a small circuit area and a feasible operating time. For these reasons, we modified the Montgomery algorithm for its efficient hardware structure for a system having a limit in its circuit area and implemented the refined algorithm in the IESA system developed for ETRI's smart card emulating system.