• Title/Summary/Keyword: 암호/복호화

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An implementation of block cipher algorithm HIGHT for mobile applications (모바일용 블록암호 알고리듬 HIGHT의 하드웨어 구현)

  • Park, Hae-Won;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.125-128
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    • 2011
  • This paper describes an efficient hardware implementation of HIGHT block cipher algorithm, which was approved as standard of cryptographic algorithm by KATS(Korean Agency for Technology and Standards) and ISO/IEC. The HIGHT algorithm, which is suitable for ubiquitous computing devices such as a sensor in USN or a RFID tag, encrypts a 64-bit data block with a 128-bit cipher key to make a 64-bit cipher text, and vice versa. For area-efficient and low-power implementation, we optimize round transform block and key scheduler to share hardware resources for encryption and decryption. The HIGHT64 core synthesized using a $0.35-{\mu}m$ CMOS cell library consists of 3,226 gates, and the estimated throughput is 150-Mbps with 80-MHz@2.5-V clock.

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Optical Security System Using Phase Mask and Interferometer (위상 카드와 간섭계를 이용한 광학적 보안 시스템)

  • Kim, Jong-Yun;Kim, Gi-Jeong;Park, Se-Jun;Kim, Cheol-Su;Bae, Jang-Geun;Kim, Jeong-U;Kim, Su-Jung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.37-43
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    • 2001
  • In this paper, we propose a new optical security technique using two phase masks based on interferometer. A binary random phase image is used as a reference image and the encrypted image is generated according to the phase difference between the reference image and the original image. If there is no phase difference of a same pixel position in two phase masks, interference intensity of the pixel has minimum value and if phase difference of a same pixel position in two phase masks is $\pi$, its interference intensity has maximum value. We can decrypt the original image by putting two phase masks on each of the two optical paths of the Mach-Zehnder interferometer. Computer simulation and the optical experiments show a good performance of the proposed optical security system.

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Truncated Differential Cryptanalysis on PP-1/64-128 (블록 암호 PP-1/64-128에 대한 부정 차분 공격)

  • Hong, Yong-Pyo;Lee, Yus-Sop;Jeong, Ki-Tae;Sung, Jae-Chul;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.6
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    • pp.35-44
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    • 2011
  • The PP-1/64-128 block cipher support variety data block and secret key size. Also, it is suitable for hardware implementation and can much easier to apply Concurrent Error Detection(CED) for cryptographic chips compared to other block ciphers, because it has same encryption and decryption process. In this paper, we proposed truncated differential cryptanalysis of PP-1/64-128. the attack on PP-1/64-128 block cipher requires $2^{50.16}$ chosen plaintexts, $2^{46.16}$ bytes memory spaces and $2^{50.45}$ PP-1/64-128 encryption to retrieve secret key. This is the best result of currently known PP-1/64-128 differential cryptanalysis.

A Round Reduction Attack on Triple DES Using Fault Injection (오류 주입을 이용한 Triple DES에 대한 라운드 축소 공격)

  • Choi, Doo-Sik;Oh, Doo-Hwan;Bae, Ki-Seok;Moon, Sang-Jae;Ha, Jae-Cheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.2
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    • pp.91-100
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    • 2011
  • The Triple Data Encryption Algorithm (Triple DES) is an international standard of block cipher, which composed of two encryption processes and one decryption process of DES to increase security level. In this paper, we proposed a Differential Fault Analysis (DFA) attack to retrieve secret keys using reduction of last round execution for each DES process in the Triple DES by fault injections. From the simulation result for the proposed attack method, we could extract three 56-bit secret keys using exhaustive search attack for $2^{24}$ candidate keys which are refined from about 9 faulty-correct cipher text pairs. Using laser fault injection experiment, we also verified that the proposed DFA attack could be applied to a pure microprocessor ATmega 128 chip in which the Triple DES algorithm was implemented.

Power-Based Side Channel Attack and Countermeasure on the Post-Quantum Cryptography NTRU (양자내성암호 NTRU에 대한 전력 부채널 공격 및 대응방안)

  • Jang, Jaewon;Ha, Jaecheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.32 no.6
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    • pp.1059-1068
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    • 2022
  • A Post-Quantum Cryptographic algorithm NTRU, which is designed by considering the computational power of quantum computers, satisfies the mathematically security level. However, it should consider the characteristics of side-channel attacks such as power analysis attacks in hardware implementation. In this paper, we verify that the private key can be recovered by analyzing the power signal generated during the decryption process of NTRU. To recover the private keys, the Simple Power Analysis (SPA), Correlation Power Analysis (CPA) and Differential Deep Learning Analysis (DDLA) were all applicable. There is a shuffling technique as a basic countermeasure to counter such a power side-channel attack. Neverthe less, we propose a more effective method. The proposed method can prevent CPA and DDLA attacks by preventing leakage of power information for multiplication operations by only performing addition after accumulating each coefficient, rather than performing accumulation after multiplication for each index.

Efficient CHAM-Like Structures on General-Purpose Processors with Changing Order of Operations (연산 순서 변경에 따른 범용 프로세서에서 효율적인 CHAM-like 구조)

  • Myoungsu Shin;Seonkyu Kim;Hanbeom Shin;Insung Kim;Sunyeop Kim;Donggeun Kwon;Deukjo Hong;Jaechul Sung;Seokhie Hong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.34 no.4
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    • pp.629-639
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    • 2024
  • CHAM is designed with an emphasis on encryption speed, considering that in the ISO/IEC standard block cipher operation mode, encryption functions are used more often than decryption functions. In the superscalar architecture of modern general-purpose processors, different ordering of operations can lead to different processing speeds, even if the computation configuration is the same. In this paper, we analyze the implementation efficiency and security of CHAM-like structures, which rearrange the order of operations in the ARX-based block cipher CHAM, for single-block and parallel implementations in a general-purpose processor environment. The proposed structures are at least 9.3% and at most 56.4%efficient in terms of encryption speed. The security analysis evaluates the resistance of the CHAM-like structures to differential and linear attacks. In terms of security margin, the difference is 3.4% for differential attacks and 6.8%for linear attacks, indicating that the security strength is similar compared to the efficiency difference. These results can be utilized in the design of ARX-based block ciphers.

Design and Implementation of a Web Security System using a Chaos Cipher Algorithm (카오스 암호화 알고리즘을 이용한 웹 보안 시스템 설계 및 구현)

  • Lee, Bong-Hwan;Kim, Cheol-Min;Yun, Dong-Won;Chae, Yong-Ung;Kim, Hyeon-Gon
    • The KIPS Transactions:PartC
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    • v.8C no.5
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    • pp.585-596
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    • 2001
  • In this paper, a new stream cipher algorithm based on the chaos theory is proposed and is applied to a Web security system. The Web security system is composed of three parts: certificate authority (CA), Web client, and Web server. The Web client and server system include a secure proxy client (SPC) and a secure management server (SMS), respectively, for data encryption and decryption between them. The certificate is implemented based on X.509 and the RSA public key algorithm is utilized for key creation and distribution to certify both the client and server. Once a connection is established between the client and server, outgoing and incoming data are encrypted and decrypted, respectively, using one of the three cipher algorithms: chaos, SEED, and DES. The proposed chaos algorithm outperforms the other two conventional algorithms in processing time and complexity. Thus, the developed Web security system can be widely used in electronic commerce (EC) and Internet banking.

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Efficient Outsourced Multiparty Computations Based on Partially Homomorphic Encryption (부분동형암호와 외부서버를 이용한 효율적인 다자간 연산 기법)

  • Eun, Hasoo;Ubaidullah, Ubaidullah;Oh, Heekuck
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.27 no.3
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    • pp.477-487
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    • 2017
  • Multiparty computation (MPC) is a computation technique where many participants provide their data and jointly compute operations to get a computation result. Earlier MPC protocols were mostly depended on communication between the users. Several schemes have been presented that mainly work by delegating operations to two non-colluding servers. Peter et al. propose a protocol that perfectly eliminates the need of users' participation during the whole computation process. However, the drawback of their scheme is the excessive dependence on the server communication. To cater this issue, we propose a protocol that reduce server communication overhead using the proxy re-encryption (PRE). Recently, some authors have put forward their efforts based on the PRE. However, these schemes do not achieve the desired goals and suffer from attacks that are based on the collusion between users and server. This paper, first presents a comprehensive analysis of the existing schemes and then proposes a secure and efficient MPC protocol. The proposed protocol completely eliminates the need of users' participation, incurs less communication overhead and does not need to solve the discrete logarithm problem (DLP) in order to get the computation results.

Low-cost AES Implementation for RFID tags (RFID 태그를 위한 초소형 AES 연산기의 구현)

  • Koo, Bon-Seok;Ryu, Gwon-Ho;Yang, Sang-Woon;Chang, Tae-Joo;Lee, Sang-Jin
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.5
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    • pp.67-77
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    • 2006
  • Radio Frequency IDentification (RFID) will soon become an important technology in various industries. Therefore, security mechanisms for Rm systems are emerging crucial problems in RFID systems. In order to guarantee privacy and security, it is desirable to encrypt the transferred data with a strong crypto algorithm. In this paper, we present the ultra-light weight Advanced Encryption Standard (AES) processor which is suitable for RFID tags. The AES processor requires only 3,992 logic gates and is capable of both 128-bit encryption and decryption. The processor takes 446 clock cycles for encryption of a 128-bit data and 607 clock cycles for decryption. Therefore, it shows 55% improved result in encryption and 40% in decryption from previous cases.

A Power Analysis Attack Countermeasure Not Using Masked Table for S-box of AES, ARIA and SEED (마스킹 테이블을 사용하지 않는 AES, ARIA, SEED S-box의 전력 분석 대응 기법)

  • Han, Dong-Guk;Kim, Hee-Seok;Song, Ho-Geun;Lee, Ho-Sang;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.2
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    • pp.149-156
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    • 2011
  • In the recent years, power analysis attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate values in the en/decryption computations are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the countermeasure for S-box must be efficiently constructed in the case of AES, ARIA and SEED. Existing countermeasures for S-box use the masked S-box table to require 256 bytes RAM corresponding to one S-box. But, the usage of the these countermeasures is not adequate in the lightweight security devices having the small size of RAM. In this paper, we propose the new countermeasure not using the masked S-box table to make up for this weak point. Also, the new countermeasure reduces time-complexity as well as the usage of RAM because this does not consume the time for generating masked S-box table.