• Title/Summary/Keyword: 쓰기 패턴

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A performance analysis of Solid State Disk for Linux I/O scheduler (리눅스 I/O 스케줄러에 대한 SSD 성능 분석)

  • Park, Hyun-Chan;Yoo, Chuck
    • Proceedings of the Korean Information Science Society Conference
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    • 2010.06b
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    • pp.460-464
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    • 2010
  • SSD는 뛰어난 성능으로 인해 서버 시장에서 HDD를 빠르게 대체하며 각광받고 있다. 우리는 기존 SSD의 성능 분석이 단일한 I/O 패턴에 대해서만 이루어진 점을 주목하여, 다양한 패턴의 I/O가 동시에 수행 될 경우, 성능에 어떠한 영향이 있는지 평가해보고자 한다. 이를 위해 4KB부터 64MB까지 다양한 블록크기로 순차적/임의적 읽기/쓰기 연산을 수행함과 동시에 4KB 단위의 읽기/쓰기 I/O를 수행시켜 성능에 미치는 영향을 알아보았다. 이러한 평가를 네 가지 리눅스 I/O 스케줄러에 대해 각각 수행함으로써 스케줄러에 의한 영향 또한 평가하였다. 그 결과로 우리는 새로운 SSD의 성능 특성을 발견할 수 있었으며, 이는 새로운 I/O 스케줄러 및 SSD의 FTL 개발의 기반이 되리라 예상된다.

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A Prediction-Based Data Read Ahead Policy using Decision Tree for improving the performance of NAND flash memory based storage devices (낸드 플래시 메모리 기반 저장 장치의 성능 향상을 위해 결정트리를 이용한 예측 기반 데이터 미리 읽기 정책)

  • Lee, Hyun-Seob
    • Journal of Internet of Things and Convergence
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    • v.8 no.4
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    • pp.9-15
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    • 2022
  • NAND flash memory is used as a medium for various storage devices due to its high data processing speed with low power consumption. However, since the read processing speed of data is about 10 times faster than the write processing speed, various studies are being conducted to improve the speed difference. In particular, flash dedicated buffer management policies have been studied to improve write speed. However, SSD(solid state disks), which has recently been used for various purposes, is more vulnerable to read performance than write performance. In this paper, we find out why read performance is slower than write performance in SSD composed of NAND flash memory and study buffer management policies to improve it. The buffer management policy proposed in this paper proposes a method of improving the speed of a flash-based storage device by analyzing the pattern of read data and applying a policy of pre-reading data to be requested in the future from NAND flash memory. It also proves the effectiveness of the read-ahead policy through simulation.

Performance Evaluation and Analysis for Block I/O Access Pattern between KVM-based Virtual Machine and Real Machine in the Virtualized Environment (KVM 기반 가상화 환경에서의 가상 머신과 리얼 머신의 입출력 패턴 분석 및 성능 측정)

  • Kim, Hyeunjee;Kim, Youngwoo;Kim, Youngmin;Choi, Hoonha;No, Jaechun;Park, Sungsoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.86-96
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    • 2016
  • Recently, virtualization is becoming the critical issue in the cloud computing due to its advantages of resource utilization and consolidation. In order to efficiently use virtualization services, several issues should be taken into account, including data reliability, security, and performance. In particular, a high write bandwidth on the virtual machine must be guaranteed to provide fast responsiveness to users. In this study, we implemented a way of visualizing comparison results between the block write pattern of KVM-based virtual machine and that of the real machine. Our final objective is to propose an optimized virtualization environment that enables to accelerate the disk write bandwidth.

Deduplication Technique for Smartphone Application Update Scenario (스마트폰의 어플리케이션 업데이트 패턴을 고려한 데이터 중복제거 기법 연구)

  • Park, Dae-Jun;Choi, Dong-Soo;Shin, Dong-Kun
    • Proceedings of the Korean Information Science Society Conference
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    • 2012.06a
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    • pp.364-366
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    • 2012
  • 스마트폰의 어플리케이션은 어플리케이션 생태계의 발전에 따라 그 수가 많아지고, 업데이트 또한 잦아졌다. 어플리케이션의 업데이트는 낸드 플래시 메모리에 이전 버전을 삭제하고, 새로운 버전의 어플리케이션에 대한 쓰기 명령을 내린다. 따라서 사용자는 낸드 플래시 메모리에서의 상대적으로 느린 쓰기 명령에 의해 스마트폰의 성능의 저하를 느끼고 낸드 플래시 메모리는 반복되는 지우기/쓰기 동작에 의해 수명이 단축된다. 본 논문에서는 업데이트 되는 스마트폰 어플리케이션 데이터가 이전 버전과 큰 차이가 없다는 것에 착안하여 데이터 중복제거를 통해 업데이트 성능을 향상시키고 낸드 플래시 메모리의 수명을 향상시키는 기법을 제안하고 있으며, 실험을 통해서 어플리케이션들에 대한 중복 제거율을 관찰하였다.

A Gerber-Character Recognition System with Multiple Recognizers and a Verifier (다중 인식기 및 검증기를 갖는 거버문자 인식 시스템)

  • Oh, Hye-Won;Park, Tae-Hyoung
    • Journal of the Korean Institute of Intelligent Systems
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    • v.14 no.1
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    • pp.20-27
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    • 2004
  • We propose the character recognition system for Gerber files. The Gerber file is the vector-formatted drawing file for PCB manufacturing, which includes various symbols, figures and characters. Also, the characters are written in horizontal, vertical, and reverse-vortical directions. In this paper, we newly propose the Gerber-character recognition system to recognize all of component names located in PCB. To improve the performance, we develop the multiple recognizers by neural networks and the verifier considering the structural features. The developed system has been installed to the auto-programming software for PCB assembly and inspection machines.

A High Performance Flash Memory Solid State Disk (고성능 플래시 메모리 솔리드 스테이트 디스크)

  • Yoon, Jin-Hyuk;Nam, Eyee-Hyun;Seong, Yoon-Jae;Kim, Hong-Seok;Min, Sang-Lyul;Cho, Yoo-Kun
    • Journal of KIISE:Computing Practices and Letters
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    • v.14 no.4
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    • pp.378-388
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    • 2008
  • Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

Genome Analysis Pipeline I/O Workload Analysis (유전체 분석 파이프라인의 I/O 워크로드 분석)

  • Lim, Kyeongyeol;Kim, Dongoh;Kim, Hongyeon;Park, Geehan;Choi, Minseok;Won, Youjip
    • KIPS Transactions on Software and Data Engineering
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    • v.2 no.2
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    • pp.123-130
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    • 2013
  • As size of genomic data is increasing rapidly, the needs for high-performance computing system to process and store genomic data is also increasing. In this paper, we captured I/O trace of a system which analyzed 500 million sequence reads data in Genome analysis pipeline for 86 hours. The workload created 630 file with size of 1031.7 Gbyte and deleted 535 file with size of 91.4 GByte. What is interesting in this workload is that 80% of all accesses are from only two files among 654 files in the system. Size of read and write request in the workload was larger than 512 KByte and 1 Mbyte, respectively. Majority of read write operations show random and sequential patterns, respectively. Throughput and bandwidth observed in each processing phase was different from each other.

Analysis of Memory Write Reference Patterns in Mobile Applications (모바일 앱의 메모리 쓰기 참조 패턴 분석)

  • Lee, Soyoon;Bahn, Hyokyung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.21 no.6
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    • pp.65-70
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    • 2021
  • Recently, as the number of mobile apps rapidly increases, the memory size of smartphones keeps increasing. Smartphone memory consists of DRAM and as it is a volatile medium, continuous refresh operations for all cells should be performed to maintain the contents. Thus, the power consumption of memory increases in proportion to the DRAM size of the system. There are attempts to configure the memory system with low-power non-volatile memory instead of DRAM to reduce the power consumption of smartphones. However, non-volatile memory has weaknesses in write operations, so analysis of write behaviors is a prerequisite to realize this in practical systems. In this paper, we extract memory reference traces of mobile apps and analyze their characteristics specially focusing on write operations. The results of this paper will be helpful in the design of memory management systems consisting of non-volatile memory in future smartphones.

FAST : A Log Buffer Scheme with Fully Associative Sector Translation for Efficient FTL in Flash Memory (FAST :플래시 메모리 FTL을 위한 완전연관섹터변환에 기반한 로그 버퍼 기법)

  • Park Dong-Joo;Choi Won-Kyung;Lee Sang-Won
    • The KIPS Transactions:PartA
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    • v.12A no.3 s.93
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    • pp.205-214
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    • 2005
  • Flash memory is at high speed used as storage of personal information utilities, ubiquitous computing environments, mobile phones, electronic goods, etc. This is because flash memory has the characteristics of low electronic power, non-volatile storage, high performance, physical stability, portability, and so on. However, differently from hard disks, it has a weak point that overwrites on already written block of flash memory is impossible to be done. In order to make an overwrite possible, an erase operation on the written block should be performed before the overwrite, which lowers the performance of flash memory highly. In order to solve this problem the flash memory controller maintains a system software module called the flash translation layer(FTL). Of many proposed FTL schemes, the log block buffer scheme is best known so far. This scheme uses a small number of log blocks of flash memory as a write buffer, which reduces the number of erase operations by overwrites, leading to good performance. However, this scheme shows a weakness of low page usability of log blocks. In this paper, we propose an enhanced log block buffer scheme, FAST(Full Associative Sector Translation), which improves the page usability of each log block by fully associating sectors to be written by overwrites to the entire log blocks. We also show that our FAST scheme outperforms the log block buffer scheme.

A Policy of Page Management Using Double Cache for NAND Flash Memory File System (NAND 플래시 메모리 파일 시스템을 위한 더블 캐시를 활용한 페이지 관리 정책)

  • Park, Myung-Kyu;Kim, Sung-Jo
    • Journal of KIISE:Computer Systems and Theory
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    • v.36 no.5
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    • pp.412-421
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    • 2009
  • Due to the physical characteristics of NAND flash memory, overwrite operations are not permitted at the same location, and therefore erase operations are required prior to rewriting. These extra operations cause performance degradation of NAND flash memory file system. Since it also has an upper limit to the number of erase operations for a specific location, frequent erases should reduce the lifetime of NAND flash memory. These problems can be resolved by delaying write operations in order to improve I/O performance: however, it will lower the cache hit ratio. This paper proposes a policy of page management using double cache for NAND flash memory file system. Double cache consists of Real cache and Ghost cache to analyze page reference patterns. This policy attempts to delay write operations in Ghost cache to maintain the hit ratio in Real cache. It can also improve write performance by reducing the search time for dirty pages, since Ghost cache consists of Dirty and Clean list. We find that the hit ratio and I/O performance of our policy are improved by 20.57% and 20.59% in average, respectively, when comparing them with the existing policies. The number of write operations is also reduced by 30.75% in average, compared with of the existing policies.