• Title/Summary/Keyword: 신호 최적화

Search Result 947, Processing Time 0.028 seconds

Implementation of a Face Authentication Embedded System Using High-dimensional Local Binary Pattern Descriptor and Joint Bayesian Algorithm (고차원 국부이진패턴과 결합베이시안 알고리즘을 이용한 얼굴인증 임베디드 시스템 구현)

  • Kim, Dongju;Lee, Seungik;Kang, Seog Geun
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.21 no.9
    • /
    • pp.1674-1680
    • /
    • 2017
  • In this paper, an embedded system for face authentication, which exploits high-dimensional local binary pattern (LBP) descriptor and joint Bayesian algorithm, is proposed. We also present a feasible embedded system for the proposed algorithm implemented with a Raspberry Pi 3 model B. Computer simulation for performance evaluation of the presented face authentication algorithm is carried out using a face database of 500 persons. The face data of a person consist of 2 images, one for training and the other for test. As performance measures, we exploit score distribution and face authentication time with respect to the dimensions of principal component analysis (PCA). As a result, it is confirmed that an embedded system having a good face authentication performance can be implemented with a relatively low cost under an optimized embedded environment.

Walking Aid System for Visually Impaired People by Exploiting Touch-based Interface (촉각 인터페이스를 이용한 시각장애인 보행보조 시스템)

  • Lee, Ji-eun;Oh, Yoosoo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2015.10a
    • /
    • pp.522-525
    • /
    • 2015
  • In this paper, we propose a walking aid system that guides route to visually impaired people in order to recognize uncertain obstacles based on tactile stimulation. The proposed system is composed of the touch-based obstacle detection module, the obstacle height detection module, and the route guidance algorithms. The touch-based obstacle detection module detects each obstacle, which is located at left, right, and front of a visually impaired person by stimulating his thumb with the rotational force of the servomotor. The obstacle height detection module integrates detected data by the linear arrangement of ultrasonic sensors to identify the height of an obstacle about 3 of-phase(i.e., high, medium, low). The proposed route guidance algorithm guides an optimized path to the visually impaired person by updating his current position information based on the signal of the built-in GPS receiver in smartphone. In addition, the route guidance algorithm delivers information with speech to a visually impaired person through Bluetooth commuination in the developed route guidance app. The proposed system can create a path to avoid the obstacles by recognizing the placed situation of the obstacles with exploring the uncertain path.

  • PDF

Development of the Frequency Synthesizer for Multi-function Radar (다기능 레이더용 주파수합성기 개발)

  • Yi, Hui-min;Choi, Jae-hung;Han, Il-tak
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.22 no.8
    • /
    • pp.1099-1106
    • /
    • 2018
  • In this paper, we developed and then analyzed the specifications of the frequency synthesizer which was applied to long range MFR (Multi-function Radar). These specifications were able to guarantee the functions and performance of MFR. MFR was the radar system that used phase array for electronically scanning. This frequency synthesizer made various frequency signals including to STALO (Stable Local Oscillator) for MFR. By analyzing the MFR requirements, we choose the optimal frequency synthesis method and then we got the best performance and functionality including to physical size for this system. We designed and fabricated DDS (Direct Digital Synthesizer)-driven Offset-PLL (Phase Locked Loop) synthesizer to meet the requirements which were low phase noise, fast switching time and low spurious. This synthesizer had less than -131dBc/Hz@100kHz phase noise and less than $4.1{\mu}s$ switching time, respectively.

A Preprocessing Approach to Improving the Quality of the Music Produced by the EVRC (EVRC 코덱으로 재생하는 음악의 품질을 개선하기 위한 전처리 기법)

  • 남영한;하태균;전윤호;김재수;박섭형
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.5C
    • /
    • pp.476-485
    • /
    • 2003
  • This paper proposers a preprocessing approach to improving the quality of the music produced by the EVRC(enhanced variable rate codec) which is one of the CDMA(Code Division Multiple Access) voice codecs. Since the EVRC is optimized only for speech signals, it can deteriorate the quality of the music passed through it. One of the problems with the EVRC-coded music is time-clipping, which usually occurs when subsequent frames are encoded at Rate l/8. Since the EVRC determines the bit rate for an input frame based on the long-term prediction gain, we increase the long-term prediction gain in order for the most of the frames to be encoded at Rate 1 or Rate 1/2. Experimental results show that the approach works well on music signals and the number of time-clipped frames is considerably reduced.

Design of an Optimal RSA Crypto-processor for Embedded Systems (내장형 시스템을 위한 최적화된 RSA 암호화 프로세서 설계)

  • 허석원;김문경;이용석
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.4A
    • /
    • pp.447-457
    • /
    • 2004
  • This paper proposes a RSA crypto-processor for embedded systems. The architecture of the RSA crypto-processor should be used relying on Big Montgomery algorithm, and is supported by configurable bit size. The RSA crypto-processor includes a RSA control signal generator, an optimal Big Montgomery processor(adder, multiplier). We use diverse arithmetic unit (adder, multiplier) algorithm. After we compared the various results, we selected the optimal arithmetic unit which can be connected with ARM core-processor. The RSA crypto-processor was implemented with Verilog HDL with top-down methodology, and it was verified by C language and Cadence Verilog-XL. The verified models were synthesized with a Hynix 0.25${\mu}{\textrm}{m}$, CMOS standard cell library while using Synopsys Design Compiler. The RSA crypto-processor can operate at a clock speed of 51 MHz in this worst case conditions of 2.7V, 10$0^{\circ}C$ and has about 36,639 gates.

MSE-Based Power Saving Method for Relay Systems (중계 시스템을 위한 MSE-기반 송신 전력 감소 기법)

  • Joung, Jin-Gon
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.34 no.7A
    • /
    • pp.562-567
    • /
    • 2009
  • In this paper, two-hop beamforming relay system, with source, relay, and destination nodes, is considered and the transmit- and receive-beamforming vectors and the relay processing matrix are designed for minimizing a mean square error (MMSE) between the transmit and receive signals. Here, to reduce the transmit power of the source or the relay, two local inequality constraints are involved with MMSE problem. By adopting the Lagrange method, closed formed Karush-Kuhn-Tucker (KKT) conditions (equalities) are derived and an iterative algorithm is developed to solve the entangled KKT equalities. Due to the inequality power constraints, the source or the relay can reduce its transmit power when the received signal-to-noise ratios (SNRs) of the first- and the second-hop are different. Meanwhile, the destination can achieve almost identical bit-error-rate performance compared to an optimal beamforming system maximizing the received SNR. This claim is supported by a computer simulation.

Optimal Neighbor Scope-Based Location Registration Scheme in Mobile IP Networks (이동 IP 망에서의 최적 이웃 스코프 값 기반의 위치 등록 방법)

  • Suh, Bong-Sue
    • Journal of the Korea Society of Computer and Information
    • /
    • v.12 no.5
    • /
    • pp.139-144
    • /
    • 2007
  • The mobile terminal's frequent changes to the access point introduce significant network overhead in mobile IP networks. To solve this problem, we introduce a hierarchical structure with consideration given to the dynamic value of neighbor scope in IP regional registration[1]. When a mobile terminal moves within the neighbor given by the scope value, it makes registration locally without registration with its home agent. We analyze the algorithm mathematically and show the numerical results. As a result, optimization of the scope value for the localized registration under the hierarchical structure makes the proposed scheme outperform the standard mobile IP protocol[2]. This can be explained from the fact that there is only local registration for terminal's movement within the scope region. Moreover, as the signaling cost for home agent increases, the proposed scheme becomes more advantageous.

  • PDF

Design of 200 GHz Waveguide to Microstrip Transition using Probe Structure (200 GHz 대역 프로브 구조의 구형도파관-마이크로스트립 변환기 설계)

  • Lee, Sang-Jin;Baek, Tae-Jong;Ko, Dong-Sik;Han, Min;Choi, Seok-Gyu;Kim, Jung-Il;Kim, Geun-Ju;Jeon, Seok-Gy;Yoon, Jin-Seob;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.49 no.4
    • /
    • pp.47-52
    • /
    • 2012
  • We have designed the waveguide to microstrip transition using a probe structure for the center frequency of 200 GHz transceiver. The waveguide to microstrip transition is composed of probe, taper and microstrip transmission line. For design of the transition, we simulated the lengths and width of the probe and the taper to optimize the center frequency and the bandwidth using HFSS simulation tool from Ansoft. The transition is designed back-to-back structure. From the simulation results, the transition exhibits that insertion loss is below - 0.81 dB and the return loss less than -10 dB in range of 186 ~ 210 GHz.

The Analysis of Wideband Microstrip Slot Antenna with Cross-shaped Feedline (십자형 급전선을 갖는 광대역 마이크로스트립 슬롯 안테나의 특성 분석)

  • Jang, Yong-Ung;Han, Seok-Jin;Sin, Ho-Seop;Kim, Myeong-Gi;Park, Ik-Mo;Sin, Cheol-Je
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.37 no.3
    • /
    • pp.35-42
    • /
    • 2000
  • A cross-shaped microstripline-fed printed slot antenna having wide bandwidth Is presented in this paper. The proposed antenna is analyzed by using the Finite-Difference Time-Domain (FDTD) method. It was found that the bandwidth of the antenna depends highly on the length of the horizontal and vertical feedline as well as the offset position of the feedline. The maximum bandwidth of this antenna is from 1.975 GHz to 4.725 GHz, which is approximately 1.3 octave, for the VSWR $\leq$ 2. Experimental data for the return loss and the radiation pattern of the antenna are also presented. and they are in good agreement with the FDTD results.e FDTD results.

  • PDF

Systematic Network Coding for Computational Efficiency and Energy Efficiency in Wireless Body Area Networks (무선 인체 네트워크에서의 계산 효율과 에너지 효율 향상을 위한 시스테매틱 네트워크 코딩)

  • Kim, Dae-Hyeok;Suh, Young-Joo
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.36 no.10A
    • /
    • pp.823-829
    • /
    • 2011
  • Recently, wireless body area network (WBAN) has received much attention as an application for the ubiquitous healthcare system. In WBAN, each sensor nodes and a personal base station such as PDA have an energy constraint and computation overhead should be minimized due to node's limited computing power and memory constraint. The reliable data transmission also must be guaranteed because it handles vital signals. In this paper, we propose a systematic network coding scheme for WBAN to reduce the network coding overhead as well as total energy consumption for completion the transmission. We model the proposed scheme using Markov chain. To minimize the total energy consumption for completing the data transmission, we made the problem as a minimization problem and find an optimal solution. Our simulation result shows that large amount of energy reduction is achieved by proposed systematic network coding. Also, the proposed scheme reduces the computational overhead of network coding imposed on each node by simplify the decoding process.