• Title/Summary/Keyword: 시스템모델링언어

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Model-Based Design of Operational Management System for Integrated Wireless Communication Network of Korean Railway Systems (철도 통합무선망 운영관리 시스템의 모델기반 설계에 관한 연구)

  • Kim, Changwon;Kim, Kyung-Hee;Lee, Young-Hoon;Lee, Jae-Chon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.5
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    • pp.3071-3080
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    • 2015
  • The increased demand on the transport of both passengers and goods through rail systems implies higher traffic intensity and congestion on the railways, resulting in greater likelihood of accidents and also degraded passenger services. To cope with the issues, development of an integrated communication network for rails has attracted great deal of attention lately. GSM-R is such an example developed in Europe, which seems to have restrictions in providing various communication services due to network speed limit. For the reason, an LTE-based approach is under study in Korea. After the network development, operation management of the network is necessary. Design of operation management systems has been studied little and thus is the objective of this paper. To do so, a conceptual design has been carried out based on model-based approach. Specifically, a context model has first been created using the use case diagram. Then, SysML models of operational scenarios were developed for the management system. The SysML models have alternatively been expressed as EFFBD models to simulate and verify them. Consequently, the result of the conceptual system design for the operation management of the integrated wireless network is expected to be used as a basis for the detailed design later.

A Study on the Performance Analysis of Cache Coherence Protocols in a Multiprocessor System Using HiPi Bus (HiPi 버스를 사용한 멀티프로세서 시스템에서 캐쉬 코히어런스 프로토콜의 성능 평가에 관한 연구)

  • 김영천;강인곤;황승욱;최진규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.1
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    • pp.57-68
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    • 1993
  • In this paper, we describe a multiprocessor system using the HiPi bus with pended protocol and multiple cache memories, and evalute the performance of the multiprocessor system in terms of processor utilization for various cache coherence protocols. The HiPi bus is delveloped as the shared bus of TICOM II which is a main computer system to establish a nation-wide computing network in ETRI. The HiPi bus has high data transfer rate, but it doesn't allow cache-to-cache transfer. In order to evaluate the effect of cache-to-cache transfer upon the performance of system and to choose a best-performed protocol for HiPi bus, we simulate as follows: First, we analyze the performance of multiprocessor system with HiPi bus in terms of processor utilizatIOn through simulation. Each of cache coherence protocol is described by state transition diagram, and then the probability of each state is calculated by Markov steady state. The calculated probability of each state is used as input parameters of simulation, and modeling and simulation are implemented and performed by using SLAM II graphic symbols and language. Second, we propose the HiPi bus which supports cache-to-cache transfer, and analyze the performance of multiprocessor system with proposed HiPi bus in terms of processor utilization through simulation. Considered cache coherence protocols for the simulation are Write-through, Write-once, Berkely, Synapse, Illinois, Firefly, and Dragon.

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Transformation from Data Flow Diagram to SysML Diagram (데이터흐름도(DFD)의 SysML 다이어그램으로의 변환에 관한 연구)

  • Yoon, Seok-In;Wang, Ji-Nam
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.14 no.11
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    • pp.5827-5833
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    • 2013
  • Due to science and technology evolutions, modern systems are becoming larger and more complex. In developing complex systems, Model-Based Systems Engineering (MBSE), which is approach to reduce complexity, is being introduced and applied to various system domains. However, because of the modeling being made through a variety of languages, there is a problem with communication within the stakeholders and a lack of consistency in the models. In this paper, by investigating the rule explaining the transformation of one of the only traditional diagrams, DFD, to SysML and reusing the formerly built models, we attempt to implement by SysML. Analyzing each diagram's Metamodel and validating the connection of each component through bipartite graph especially suggest an effective transformation rule. Also, by applying to naval-combat system, we confirm efficiency of this study. Establishing the results of this study as basis for conducting further study, we will be able to transform other previous models gained from formerly built system to SysML. In this way, the stakeholder's communication can be improved and we anticipate that the application of SysML will be beneficial to the much efficient MBSE.

KMSCR: A system for managing knowledge assets of an IT consulting firm (IT 컨설팅 회사의 지적 자산 관리를 위한 지식관리시스템)

  • 김수연;황현석;서의호
    • Proceedings of the Korea Inteligent Information System Society Conference
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    • 2001.06a
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    • pp.233-239
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    • 2001
  • 최근 대부분의 회사들은 업무를 수행하는데 필요한 지식과 노하우를 공유하고 재사용하기 위하여 지적 자산 관리의 중요성을 인식하고 있다. 특히 고도로 지식 집약적인 업종이라 할 수 있는 IT컨설팅 회사에서는 지적 자산의 관리가 다른 어떤 회사에서보다 큰 중요성을 가지게 된다. 컨설팅 회사에 있어서 검증이 완료된 지적 자산의 공유 및 지능적이면서도 신속한 검색은 컨설팅 서비스의 품질과 고객 만족에 직결되는 중요한 요소이다. 따라서 대부분의 컨설팅 회사들은 자사의 지식 자산을 관리하기 위하여 많은 노력을 기울이고 있다. 본 논문의 목적은 IT 컨설팅 회사예서 관리되는 다양한 형태의 지적 자산들을 중앙 관리하여 설친 고객 사이트에 흩어져 프로젝트를 수행하는 컨설턴트들이 공유할 수 있도록 함으로써 컨설팅 서비스의 생산성과 품질들 높이고자 하는데 있다 이를 위하여 건설팅 회사에서 관리되는 모든 지적 자산의 재고를 조사하여 모델링하고 이를 쉽게 저장하고 검색할 수 있는 시스템 아키텍처를 제안한다. 제안된 아키텍처를 NT 기반에서 Index server를 이용하여 시스템으로 구현하였다 (KMSCR: A Knowledge Management System for managing Consulting Resources). KMSCR에서는 컨설턴트가 찾고자 하는 검색어를 입력하면 다양한 포맷의 (.doc, .ppt, xls, .rtf, .txt, .html 등과 같은) 결과물을 관련성이 높은 순서대로 출력해 줌으로써 컨설팅 리소스를 효과적으로 재사용할 수 있도록 도와 준다. 또한 검색 시에는 미리 등록된 키워드 뿐 아니라 본문 내의 텍스트 검색까지 가능하게 함으로써 컨설팅 리소스에 대한 보다 효과적이고 효율적인 검색을 가능하게 한다.간을 성능 평가 인자로 하여 수행하였다. 논문에서 제한된 방법을 적용한 개선된 RICH-DP을 모의 실험을 통하여 분석한 결과 기존의 제한된 RICH-DP는 실시간 서비스에 대한 처리율이 낮아지며 서비스 시간이 보장되지 못했다. 따라서 실시간 서비스에 대한 새로운 제안된 기법을 제안하고 성능 평가한 결과 기존의 RICH-DP보다 성능이 향상됨을 확인 할 수 있었다.(actual world)에서 가상 관성 세계(possible inertia would)로 변화시켜서, 완수동사의 종결점(ending point)을 현실세계에서 가상의 미래 세계로 움직이는 역할을 한다. 결과적으로, IMP는 완수동사의 닫힌 완료 관점을 현실세계에서는 열린 미완료 관점으로 변환시키되, 가상 관성 세계에서는 그대로 닫힌 관점으로 유지 시키는 효과를 가진다. 한국어와 영어의 관점 변환 구문의 차이는 각 언어의 지속부사구의 어휘 목록의 전제(presupposition)의 차이로 설명된다. 본 논문은 영어의 지속부사구는 논항의 하위간격This paper will describe the application based on this approach developed by the authors in the FLEX EXPRIT IV n$^{\circ}$EP29158 in the Work-package "Knowledge Extraction & Data mining"where the information captured from digital newspapers is extracted and reused in tourist information context.terpolation performance of CNN was relatively

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Design and Implementation of Co-Verification Environments based-on SystemVerilog & SystemC (SystemVerilog와 SystemC 기반의 통합검증환경 설계 및 구현)

  • You, Myoung-Keun;Song, Gi-Yong
    • Journal of the Institute of Convergence Signal Processing
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    • v.10 no.4
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    • pp.274-279
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    • 2009
  • The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In this paper, verification environments based-on SystemVerilog and SystemC, one is native-code co-verification environment which makes prompt functional verification possible and another is SystemVerilog layered testbench which makes clock-level verification possible, are implemented. In native-code co-verification, HW and SW parts of SoC are respectively designed with SystemVerilog and SystemC after HW/SW partitioning using SystemC, then the functional interaction between HW and SW parts is carried out as one simulation process. SystemVerilog layered testbench is a verification environment including corner case test of DUT through the randomly generated test-vector. We adopt SystemC to design a component of verification environment which has multiple inheritance, and we combine SystemC design unit with the SystemVerilog layered testbench using SystemVerilog DPI and ModelSim macro. As multiple inheritance is useful for creating class types that combine the properties of two or more class types, the design of verification environment adopting SystemC in this paper can increase the code reusability.

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Antecedent Identification of Zero Subjects using Anaphoricity Information and Centering Theory (조응성 정보와 중심화 이론에 기반한 영형 주어의 선행사 식별)

  • Kim, Kye-Sung;Park, Seong-Bae;Lee, Sang-Jo
    • KIPS Transactions on Software and Data Engineering
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    • v.2 no.12
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    • pp.873-880
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    • 2013
  • This paper approaches the problem of resolving Korean zero pronouns using Centering Theory modeling local coherence. Centering Theory has been widely used to resolve English pronouns. However, it is much difficult to apply the centering framework for zero pronoun resolution in languages such as Japanese and Korean. Since in particular the use of non-anaphoric zero pronouns without explicit antecedents is not considered in the Centering Theory of Grosz et al., the presence of non-anaphoric cases negatively affects the performance of the resolution system based on Centering Theory. To overcome this, this paper presents a method which determines the intra-sentential anaphoricity of zero pronouns in subject position by using relationships between clauses, and then identifies antecedents of zero subjects. In our experiments, the proposed method outperforms the baseline method relying solely on Centering Theory.

Implementation of AMGA GUI Client Toolkit : AMGA Manager (AMGA GUI Client 툴킷 구현 : AMGA Manager)

  • Huh, Tae-Sang;Hwang, Soon-Wook;Park, Guen-Chul
    • The Journal of the Korea Contents Association
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    • v.12 no.3
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    • pp.421-433
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    • 2012
  • AMGA service, which is one of the EMI gLite middleware components, is widely used for analysis of distributed large scale experiments data as metadata repository by scientific and technological researchers and the use of AMGA is extended farther to include general industries needing metadata Catalogue as well. However AMGA, based unix and Grid UI, has the weakness of being absence of general-purpose user interfaces in comparison to other commercial database systems and that's why it's difficult to use and diffuse it although it has the superiority of the functionality. In this paper, we developed AMGA GUI toolkit to provide work convenience using object-oriented modeling language(UML). Currently, AMGA has been used as the main component among many user communities such as Belle II, WISDOM, MDM, and so on, but we expect that this development can not only lower the barrier to entry for AMGA beginners to use it, but lead to expand the use of AMGA service over more communities.

Development of the 3-D Fracture Network Analysis and Visualization Software Modules (삼차원 불연속면 연결구조 해석 및 가시화 소프트웨어 모듈 개발)

  • Noh, Young-Hwan;Choi, Yosoon;Um, Jeong-Gi;Hwang, Sukyeon
    • Tunnel and Underground Space
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    • v.23 no.4
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    • pp.261-270
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    • 2013
  • As part of the development of the 3-D geologic modeling software, this study addresses on new development of software modules that can perform the analysis and visualization of the fracture network system in 3-D. The developed software modules, such as BOUNDARY, DISK3D, FNTWK3D, CSECT and BDM, are coded on Microsoft Visual Studio platform using the MFC and OpenGL library supported by C++ program language. Each module plays a role in construction of analysis domain, visualization of fracture geometry in 3-D, calculation of equivalent pipes, production of cross-section map and management of borehole data, respectively. The developed software modules for analysis and visualization of the 3-D fracture network system can be used to tackle the geomechanical problems related to strength, deformability and hydraulic behaviors of the fractured rock masses. All these benefits will further enhance the economic competitiveness of the domestic software industry.

Simulator Development of Wireless Avionics Intra-Communications (항공기내 무선 네트워크용 시뮬레이터 개발)

  • Shin, Dong-Seong;Jung, Bang Chul;Ban, Tae-Won;Chang, Woohyuk;Park, Pangun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.10
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    • pp.1873-1878
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    • 2017
  • Recently, many researches have been conducted on the aviation industry to replace the wire harness cable between the avionics of the aircraft with the wireless network. In this paper, we present an Event-Based Simulator for Wireless Avionics Intra-Communications (ES-WAIC) that can verify core technologies of wireless networks and efficiently integrate different layers of the network. ES-WAIC is developed to enhance the readability between the real time control application developers of the higher layer and the network layer developers. Specifically, the practical implement relies on an event-based programming concept to increase portability and compatibility that can be applied to the realistic low-power wireless embedded networks. ES-WAIC implements the overall system layers including the wireless channel modeling of the 4.4GHz band, the physical layer, the medium access control, the network, and the application layer of wireless avionics intra-communications.

Design of a Multi-Thread Architecture for an LLRP Server (LLRP(Low Level Reader Protocol) 서버를 위한 멀티쓰레드 구조의 설계)

  • Lee, Tae-Young;Kim, Yun-Ho;Seong, Yeong-Rak;Oh, Ha-Ryoung
    • The KIPS Transactions:PartA
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    • v.19A no.2
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    • pp.93-100
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    • 2012
  • LLRP (Low-Level Reader Protocol) specifies an interface between RFID readers and RFID applications, also called LLRP servers and clients respectively. An LLRP server should concurrently execute various functions. This paper designs an LLRP server of a multi-threaded architecture. For that, (i) the operational procedure between LLRP servers and clients is investigated, (ii) the functional requirements of LLRP servers are presented, (iii) the operation of an LLRP server is decomposed into several threads to satisfy those functional requirements, and (iv) the operational procedure is further examined in thread-level. To validate the designed architecture, it is modeled and simulated by using the DEVS formalism which specifies discrete event systems in a hierarchical, modular manner. From the simulation result, we can conclude that the proposed architecture conforms the LLRP standard and satisfies all the given functional requirements.