• Proceedings of the Korea Information Processing Society Conference
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• 2004.05a
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• pp.1493-1496
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• 2004

디지털 방송을 수신하는 셋탑박스가 IEEE1394 시리얼 버스를 사용하여 홈네트워크 상의 다른 위치에 존재하는 디스플레이 장치로 수신된 방송 컨텐츠를 재전송 하고 방송중인 채널의 변경이 가능하게 한다. 방송 스트림의 재전송은 IEEE1394 의 등시성 전송 방식을 이용하여 질적 열화가 없고 QoS가 보장되는 형태로 전송이 가능하도록 하며, 채널의 변경은 채널 변경 프로토콜을 이용하여 비동기 전송 방식을 통해 전달하여 데이터 전송의 명확성을 부여할 수 있다. 본 논문은 셋탑박스를 통해시청중인 방송의 채널 변경과 확인 등의 작업을 위한 프로토콜을 제공하여, 댁내에서 방송 및 MPEG2 TS 스트림의 재전송을 가능하게 하는 기법을 제안한다.

• Proceedings of the KIEE Conference
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• 2000.07d
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• pp.2904-2906
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• 2000

본 논문에서는 반도체 제조 공정에서 장비와 호스트간에 통신을 할 수 있는 SECS(SEMI Equipment Communications Standard) 프로토를의 개발을 제안한다. SECS 프로토콜은 메시지 전송을 위한 헤더 부분을 정의하는 SECS-I 프로토콜과 메시지 내용을 정의하는 SECS-II 프로토콜로 나뉘어지는데, RS232 시리얼 통신을 하는 SECS-I 프로토콜 대신에 이더넷(ethernet)을 통해 TCP/IP 통신을 할 수 있는 HSMS 프로토콜을 구현하고자 한다. HSMS(High-speed SECS Message Services)프로토콜은 SECS-I과 마찬가지로 SECS-II 메시지 내용을 전송 할 수 있도록 10바이트 크기의 헤더로 정의된다. HSMS 프로토콜 통신은 TCP/IP를 기반으로 하기 때문에 SECS 메시지 전송을 위한 통신 선로를 설정하기 위해 소켓 API를 응용하고 항상 통신 대기상태를 유지하기 위해 데몬(daemon) 형태로 구성한다. 실제 메시지 내용을 정의하고 있는 SECS-II 프로토콜은 데이터 인덱스 테이블과 표준에 정의된 형식에 맞게 파일형태나 DLL(Dynamic Link Library)형태로 구성하고 프로세스 프로그램(process program)을 수행하기 위해 SECS 프로토콜 표준에서 정의하는 SML(SECS Message Language)형식으로 변환 할 수 있는 스크립트 변환기(script translator)를 구현한다. 또한 HSMS 프로토콜이 전송할 SECS-II 메시지를 저장하기 위한 파라미터를 정의하고 실제 통신을 위한 테스트 베드를 위한 응용 프로그램을 제작한다

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.7
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• pp.1603-1609
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• 2010

This Paper deals with a design, making a prtotype and test methods of Real-time towed Line Array Sensor Data processing board for fast data communication and long range data transmission with SFM(Serial FPDP Module) through Optic-fiber channel. Towed line array sensors are installed in Frigate and the each LAS A, B, C group data from LAS is packed a previously agreed protocol and transmitted to the signal processing unit. Considering the limited space of VME 6U size, LAS Data processing board is designed with MPC8265 PowerPC Controller of Freescale for main system control and Altera's CycloneIII FPGA for sensor data packing, self-test simulation data generation, S/W FIFO et cetera. LAS Data processing board have VxWorks, the RTOS(Real Time Operating System) that present many device drivers, peripheral control libraries on board for real-time data processing.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.371-374
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• 2009

This Paper deal with a design, making a prtotype and test methods of Real-time towed Line Array Sensor Data processing board for fast data communication and long range transmission with SFM(Serial FPDP Module) through Optic-fiber channel. The LAS A,B,C group Data from towed line array sensor which is installed in FFX(Fast Frigate eXperimental) of Korean Navy is packed a previously agreed protocol and transmitted to the Signal processing unit. Consider the limited space of VME 6U size, LAS Data processing board is designed with MPC8265 PowerPC Controller of Freescale for main system control and Altera's CycloneIII FPGA for sensor data packing, self-test simulation data generation, S/W FIFO et cetera. LAS Data processing board have VxWorks, the RTOS(Real Time Operating System) that present many device drivers, peripheral control libraries on board for real-time data processing.

• Proceedings of the Korea Information Processing Society Conference
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• 2023.11a
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• pp.784-785
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• 2023

본 논문에서는 로봇이 아파트 단지의 세대번호를 인식 및 택배를 하차시키는 기능을 소개한다. 아두이노와 RFID 리더기, UID칩을 활용하여 세대별로 UID를 부여하여 목표지점을 탐색한다. 아두이노간 시리얼 통신하여 UID데이터를 전달하고 이후 UID와 주소를 확인한 후 일치 시 택배를 모터를 이용하여 하차시킨다.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.3
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• pp.341-347
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• 2015

This study aims to design a chief VDR(Voyage Data Recorder) system which is appropriate to small and medium sized vessels and also implement the data about marine communication devices, sensors, etc. to be stored or printed at the navigator when those data are connected to VDR through data communication between marine navigation and VDR which are based on serial communication or internet in order to prove efficiency of the marine navigator. Also, the design of VDR is intended to be small and light in order to expand to apply it to small and medium vessels, which enables to analyze causes of marine accidents precisely through its characteristic functions which are the same as those at "vehicle mounted black-box" (location of the car, image and voice storage) by which the same roles are played on land.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.1 s.343
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• pp.121-126
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• 2006

This paper report on the design and implementation of a 9.6kbps DSSS CDMA modem for a medium speed wireless link. The proposed modem provides a general purpose I/O interface with a microprocessor. The I/O interface consists of 8-bit data bus, chip enable, read/write, and interrupt pins. In transmit block, the 8-bit data delivered from the I/O interface buffer is converted to 9.6kbps serial data, which are spreaded into 76.8kcps with 8-bit PN code generated inside the modem by direct sequence method. An 8-bit training sequence is preceded in the data frame for data synchronization in receiver. In receiver block the PN code is synchronized from the received data spreaded to 76.8kcps and find the data timing from the 8-bit training sequence. We have used the Early-and-Late integration method. The modem has been implemented and verified using a Xilix FPGA board and has been fabricated as an ASIC CHIP through Hynir $0.25{\mu}m$ CMOS. The multiple accessing method is DSSS CDMA.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.2
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• pp.184-190
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• 2014

Until now ship communication micro serial network communication method is designed for the communication between the controller and the RS-422 communication on the international standard ISO 1993, but gradually progresses NMEA 2000 standardized fast Ethernet-based communications environments expected to be replaced. In addition, the ship's main instrumentation equipment versatility with ease gradually to control devices by monitoring and controlling are. Wind anemometer, ship mast end, where the highest wind farms typically install a separate console boxes, data loggers, indicators was required in order to manage them, to maintain them, to go through the procedures and cumbersome data update firmware were Therefore, in this paper, using the PC network, ultrasonic wind speed data processing system for implementing functional was expressed as a function of the technology elements, NMEA 2000 standard certified in separate operating console without the features of the data loggers, indicators, implementation by ultrasonic wind data processing system was implemented to minimize the maintenance cost of the operating system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.266-271
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• 1999

The purpose in this study has to development the system on increasing operation of old-typed transceiver for solve the question that limited allocation frequencies and continuesly icreasment of traffic. Therefore, we are desigened the remote control system that has the function for variable channels, PTT and monitoring of transmission power and frequencies. Exchange of control data is to hold in common the twist two-wire or telephone line for the voice transmission. The H/W is consist of FSK and MCS-51 processor which are up-down control of channel, n control and monitoring display by serial data transmission. According to the simplex traffic operation is designed the algorithm of serial data transmission by sequential transmission sequence and protocol. The S/W of sequential transmission sequence is designed to usefully the intergrated communications system which is able to connection between the multi-transceiver and multi-terminal by master processor.

• Journal of Korea Society of Industrial Information Systems
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• v.20 no.6
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• pp.21-27
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• 2015

We analyze the problem that is occurring when using parity mode transformation required for 9 bit serial communication under Linux environment and propose the solution. The parity mode change is used for 9 bit serial communication in the Linux that by nature supports only 8 bit serial communication. delay (around OS tick) arises. Our analysis shows that the cause is minimum length of waiting time to transmit data remained in Tx FIFO buffers. A modified Linux serial driver proposed in this paper decreases the delay less than 1ms by using accurate time delaying. Despite various system communication interfaces, enormous existing standards and system have adopted RS-232 serial communication, and the part of them have communicated by 9bit serial.