• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.7
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• pp.1390-1406
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• 1994

This study deals with the DMCLP(Delay constrained Minimum Cost Loop Problem)-one of problems arising in the design of local access computer networks. The problem consists of finding a set of rings to satisfy the traffic requirements of end user terminals. In the problem, the objective is to minimize the total link cost. This paper presents heuristic algorithm which consists of two phases for this problem, under the constraints that the number of nodes served by a single ring is limited and network mean delay is dropped within the desired time. The algorithm is derived using the clusters obtained by the existing MCLP(Minimum Cost Loop Problem) algorithm and a trade-off criterion explained in the paper. Actually, simulation results in that the proposed algorithm in this paper produces better solution than the existing MCLP algorithm modified. In addition, the algorithm has the relatively short running time.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.9-16
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• 2012

In this paper, we focus on end-to-end transfer delay improvement by using network coding and propose a scheme where a message is divided into several packets which are network coded generating additional redundancy with the results that the number of transmitted packets increases. In networks with high coefficient of variation of transfer time, increased number of packets could reduce the transfer time of the message to a destination. For the proposed scheme, we investigate the optimum number of divided packets and redundancy considering transfer delay reduction and additional transmission cost caused by using network coding under the restriction of maximum transmission packet size. From the results of the investigation, we see that the proposed scheme is effective in networks having high variability of transfer time and would be very useful and practical especially for the case that expedited deliveries of messages are needed.

• Journal of the Korea Society of Computer and Information
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• v.4 no.3
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• pp.35-46
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• 1999

In this paper, we propose a new CPLD technology mapping algorithm improving run-time under time constraint. In our technology mapping algorithm. a given logic equation is constructed as the DAG type. then the DAG is reconstructed by replicating the node that outdegree is more than or equal to 2. As a result, it makes delay time and the number of CLBs, run-time to be minimized. Also. after the number of multi-level is defined and cost of each nodes is calculated, the graph is partitioned in order to fit to k that is the number of OR term within Cl.B. The partitioned nodes are merged through collapsing and bin packing is performed in order to fit to the number of OR term within CLB. In the results of experiments to MCNC circuits for logic synthesis benchmark, we can shows that proposed technology mapping algorithm reduces run-time much more than the TMCPLD.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2013.06a
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• pp.216-217
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• 2013

대형 조선소에서 하루 수십, 수백 개의 블록 이동이 있고 이동량이 많아지면 트랜스포터의 수, 운전기사, 신호수의 요구 증가를 야기해 비용 증가에 영향을 미친다. 또한 조선소에서 블록 이동은 공정 사이의 흐름에 영향을 미치며 전체 일정을 지연시킬 수도 있다. 그러므로 잘짜여진 블록 이동문제는 생산성 증가과 총 비용 감소에 있어 중요하다. 트랜스포터를 이용하여 블록을 이동하는데 트랜스포터란 고가의 특수운반차량으로 조선소에서 종류별(수백톤급)로 보유하고 있다. 트랜스포터는 가용 중량 이상의 블록을 이동할 수 없는데 이 때 두 대 이상의 차량을 결합하여 운반할 수 있다. 본 연구에서는 블록 무게와 트랜스포터의 적재 용량을 고려한 트랜스포터의 일정계획 문제를 다룬다. 계획된 공정 시간에 맞춰 블록이 도착할 수 있도록(지연시간 최소화)하는 모형을 정의하고 휴리스틱 알고리즘을 제안한다. 그리고 실험을 통해 최적화 모형과 휴리스틱 알고리즘의 효과를 검증하고자 한다.

• The KIPS Transactions:PartC
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• v.10C no.3
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• pp.367-376
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• 2003

This study deals with the DCMST (Delay constrained Capacitated Minimum Spanning Tree) problem applied in the topological design of local networks or finding several communication paths from root node. While the traditional CMST problem has only the traffic capacity constraint served by a port of root node, the DCMST problem has the additional mean delay constraint of network. The DCMST problem consists of finding a set of spanning trees to link end-nodes to the root node satisfying the traffic requirements at end-nodes and the required mean delay of network. The objective function of problem is to minimize the total link cost. This paper presents two-phased heuristic algorithm, which consists of node exchange, and node shift algorithm based on the trade-off criterions, and mean delay algorithm. Actual computational experience and performance analysis show that the proposed algorithm can produce better solution than the existing algorithm for the CMST problem to consider the mean delay constraint in terms of cost.

• Asia-Pacific Journal of Business Venturing and Entrepreneurship
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• v.7 no.4
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• pp.49-54
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• 2012

In this paper, a software policy considering testing time and the number of errors corrected is presented. The software is tested until a specified testing time or the time to a specified number of errors are corrected, whichever comes first. The model includes the cost of error correction and software testing during the testing time, and the cost of error correction during operation. It is assumed that the length of software life cycle has no bounds, and the error correction follows an non-homogeneous Poisson process. An expression for the total cost under the policy is derived. It is shown that the model includes the previous models as special cases.

• Journal of Digital Contents Society
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• v.15 no.2
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• pp.137-145
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• 2014

In this paper, we focus on end-to-end transfer delay improvement by using erasure coding when delivering expediting message consisting of M packets in networks with high coefficient of variation of transfer time. In the scheme, M packets are divided into b groups with each having g packets. Each group is erasure coded with additional r packets and transmitted. Since the first arrived g packets among g+r packets completes the delivery of the group, the delivery time of the expediting message is reduced. For the scheme, we investigate the optimum group size and number of redundancy packets considering delivery delay reduction and additional transmission cost caused by using erasure coding. From the results of the investigation, we see that the proposed scheme is effective in networks having high variability of transfer time and would be very useful and practical especially for the case that expedited deliveries of messages are needed.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.11a
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• pp.527-530
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• 2002

본 논문에서는 하드웨어/소프트웨어 시스템의 파이프라인 실행을 지원하는 알고리즘을 제안한다. 파이프라인 실행을 지원하기 위해 시간제약과 면적제약조건을 만족하는 분한 결과를 찾는 기존의 방법은 하드웨어/소프트웨어 분할과 파이프라인 스케줄링을 독립적으로 실행하였으며 최소시간의 파이프라인 입력간격으로부터 최적의 분할 결과를 얻기 위해 점진적인 방법을 사용하기 때문에 많은 알고리즘 실행시간을 가진다. 본 논문에서는 분할 단계에서 스케줄링을 함께 고려하면서 최소 입력 간격을 갖는 파이프라인 실행을 지원하는 낮은 복잡도의 알고리즘을 제안한다. 이를 위해 최소입격간격에서의 파티션에 분포하는 노드와 종속성을 찾아서 하드웨어 구현과 프로세서에서의 분포 그래프를 생성하고, 상대적 스케줄 긴박도[8]를 구할 때는 노드 별 실행시간과 구현비용을 고려하며 분할 이후에 발생하는 통신 지연 시간을 힘 에 반영한다. 논문은 최소 입력 간격내에서 구성되는 파티션에 존재하는 노드의 파이프라인 스케줄과 시스템 제약시간을 만족하면서 구현비용을 저하시키기 위한 낮은 실행시간을 갖는 분한 알고리즘을 제안한다.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.9
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• pp.461-468
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• 2001

Though shared virtual memory (SVM) system promise low cost solutions for high performance computing they suffer from long memory latencies. These latencies are usually caused by repetitive invalidations on shared data. Since shared data are accessed through synchronization and the patterns by which threads synchronizes are repetitive, a prefetching scheme bases on such repetitiveness would reduce memory latencies. Based on this observation, we propose a prefetching technique which predicts future access behavior by analyzing access history per synchronization variable. Our technique was evaluated on an 8-node SVM system using the SPLASH-2 benchmark. The results show the our technique could achieve 34%~45% reduction in memory access latencies.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06a
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• pp.162-165
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• 2011

인터넷 사용인구의 증가로 인한 물류 수송량의 증대를 맞아 많은 양의 물품들이 생산 공장과도 도매상 등을 거쳐 소비자에게 전달된다. 이에 여러 가지 물건들이 하나의 박스 등을 이용해 담겨져 보내어질 때, 박스에 담긴 물품의 정확한 개수 확인이 이루어지지 않는다면, 물품의 정확한 개수에 대한 재확인 및 물품의 개수가 맞지 않을 때의 사후 조치에 드는 비용 등을 통해 물류처리에 들어가는 전체 시간의 지연과 동시에 처리 비용의 증가를 초래하게 된다. 따라서 본 논문에서는 박스 등에 담긴 물품의 정확한 개수 확인을 위해 RFID 태그와 리더, 미들웨어를 사용해 정확한 실시간 물품의 개수를 측정할 수 있는 기법에 대한 연구를 담고 있으며, 이러한 연구는 물류처리 전체 시간 지연 및 처리 비용 감소에 대한 한계점을 극복하기 위하여 제시한다.