• Journal of the Korean Academy of Esthetic Dentistry
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• v.31 no.2
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• pp.64-74
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• 2022

Digital dentistry is becoming a mainstream of dental practice. We are already used to intraoral scan, guided implant surgery, manufacture of prosthesis (CAD-CAM) in our daily practice; those are not sensational anymore. However, treatment planning with digital simulations is not spotlighted enough. In this report, a digital mockup was utilized to visualize the final goal of maxillary rehabilitation including all anterior and posterior teeth, and persuade a patient who wanted restoration of only anterior teeth. We will also discuss the use of digital mockup and its actual copy as the guide of altered vertical dimension through the clinical process.

• The KIPS Transactions:PartD
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• v.9D no.5
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• pp.915-924
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• 2002

Conventional Systems for parcel sorting consist of two sequences as loading the parcel into conveyor belt system and post-code input. Using bar code information, the parcels to be recorded and managed are recognized. This paper describes a 32 $\times$ 32 sized mini-block inspection to extract bar code Region of Interest (ROI) from the line Charged Coupled Device (CCD) camera capturing image of moving parcel at 2m/sec speed. Firstly, the Min-Max distribution of the mini-block has been applied to discard the background of parcel and region of conveying belts from the image. Secondly, the diagonal inspection has been used for the extraction of letters and bar code region. Five horizontal line scanning detects the number of edges and sizes and ROI has been acquired from the detection. The wrong detected area has been deleted by the comparison of group size from labeling processes. To correct excluded bar code region in mini-block processes and for analysis of bar code information, the extracted ROI 8 boundary points and decline distribution have been used with central axis line adjustment. The ROI extraction and central axis creation have become enable within 60～80msec, and the accuracy has been accomplished over 99.44 percentage.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.43 no.1 s.307
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• pp.9-16
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• 2006

This Paper proposes an adaptive error diffusioThis paper proposes an adaptive error diffusion algorithm for text enhancement followed by an efficient text segmentation that uses the maximum gradient difference (MGD). The gradients are calculated along with scan lines, and the MGD values are filled within a local window to merge the potential text segments. Isolated segments are then eliminated in the non-text region filtering process. After the left segmentation, a conventional error diffusion method is applied to the background, while the edge enhancement error diffusion is used for the text. Since it is inevitable that visually objectionable artifacts are generated when using two different halftoning algorithms, the gradual dilation is proposed to minimize the boundary artifacts in the segmented text blocks before halftoning. Sharpening based on the gradually dilated text region (GDTR) prevents the printing of successive dots around the text region boundaries. The error diffusion algorithm with edge enhancement is extended to halftone color images to sharpen the tort regions. The proposed adaptive error diffusion algorithm involves color halftoning that controls the amount of edge enhancement using a general error filter. The multiplicative edge enhancement parameters are selected based on the amount of edge sharpening and color difference. Plus, the additional error factor is introduced to reduce the dot elimination artifact generated by the edge enhancement error diffusion. By using the proposed algorithm, the text of a scanned image is sharper than that with a conventional error diffusion without changing background.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.41 no.1
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• pp.9-18
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• 2004

This paper presents an efficient image compression method for memory reduction in multimedia processor which can be simply implemented in hardware and provides high performance. The multimedia processor, which includes processing of high-resolution images and videos, requires large memories: they are external frame memories to store frames and internal line memories for implementing some linear filters. If we can reduce those memories by adopting a simple compression method in multimedia processor, it will strengthen its cost competitiveness. There exist many standards for efficiently compressing images and videos. However, those standards are too complex for our purpose and most of them are 2-D block-based methods, which do not support raster scanned input and output. In this paper, we propose a low-complexity compression method which has good performance, can be implemented with simple hardware logic, and supports raster scan. We have adopted 1${\times}$8 Hadamard transform for simple implementation in hardware and compression efficiency. After analyzing the coefficients, we applied an adaptive thresholding and quantization. We provide some simulation results to analyze its performance and compare with the existing methods. We also provide its hardware implementation results and discuss about cost reduction effects when applied in implementing a multimedia processor.

• Journal of KIISE
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• v.43 no.5
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• pp.516-523
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• 2016

For old-age makeups, makeup artists first make a mold cast of an actor's face using plaster and then sculpt wrinkles in clay on the plaster mold. After finishing the clay sculpture, its negative plaster mold is fabricated and silicone skin patches are finally made for application to the actor's face. This process takes a few days and is tedious for actors and makeup artists. With recent advances in 3D printing and scanning technology, it is becoming easier to scan and fabricate 3D faces. This paper presents a new pipeline composed of facial scanning, interactive wrinkle modeling, and mold printing stages to easily and efficiently fabricate silicone masks for old-age makeups without the use of plaster and clay. An intuitive sketch interface based on a normal map is proposed for the creation of wrinkles in real time, even with a high-resolution face model. Then the geometry of the final wrinkles is reconstructed using a depth map and the negative mold of the wrinkled face is printed. We also show that the presented pipeline can fabricate a silicone mask more conveniently than the traditional one that consists of pouring silicone into the prepared negative mold and then overlapping the mold with the original positive one.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.4
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• pp.383-391
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• 2010

A Lifelog management system provides users with services to store, manage, and search their life logs. This paper proposes a fully-automatic collecting method of real world social contacts and lifelog search engine using collected social contact information as keyword. Wireless short-distance network devices in mobile phones are used to detect social contacts of their users. Human-Bluetooth relationship matrix is built based on the frequency of a human-being and a Bluetooth device being observed at the same time. Results show that with 20% of social contact information out of full social contact information of the observation times used for calculation, 90% of human-Bluetooth relationship can be correctly acquired. A lifelog search-engine that takes human names as keyword is suggested which compares two vectors, a row of Human-Bluetooth matrix and a vector of Bluetooth list scanned while a lifelog was created, using vector information retrieval model. This search engine returns more lifelog than existing text-matching search engine and ranks the result unlike existing search-engine.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1914-1924
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• 2014

In this paper, a small-area cell array method of reducing number of SL drivers requiring large layout areas, where the SL drivers supplying programming currents are routed in the row direction in stead of the column direction for eFuse OTP memory IPs having less number of rows than that of columns such as a cell array of four rows by eight columns, and a core circuit are proposed. By adopting the proposed cell array and core circuit, the layout area of designed 32-bit eFuse OTP memory IP is reduced. Also, a V2V ($=2V{\pm}10%$) regulator necessary for RWL driver and BL pull-up load to prevent non-blown eFuse from being blown from the EM phenomenon by a big current is designed. The layout size of the designed 32-bit OTP memory IP having a cell array of four rows by eight columns is 13.4% smaller with $120.1{\mu}m{\times}127.51{\mu}m$ ($=0.01531mm^2$) than that of the conventional design with $187.065{\mu}m{\times}94.525{\mu}m$ ($=0.01768mm^2$).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.63-72
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• 2012

In this paper, we proposed a parallel architecture of line & block edge filter for high-performance H.264/AVC deblocking filter for Quad Full High Definition(Quad FHD) video real time processing. To improve throughput, we designed 4-parallel block edge filter with 16 line edge filter. To reduce internal buffer size and processing cycle, we scheduled 4-parallel zig-zag scan order as deblocking filtering order. To avoid data conflicts we placed 1 delay cycle between block edge filtering. We implemented interleaving buffer, as internal buffer of block edge filter, to sharing buffer for reducing buffer size. The proposed architecture was simulated in 0.18um standard cell library. The maximum operation frequency is 108MHz. The gate count is 140.16Kgates. The proposed H.264/AVC deblocking filter can support Quad FHD at 113.17 frames per second by running at 90MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.22-34
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• 2010

Existing image scalers generally adopt simple interpolation methods such as bilinear method to take cost-benefit, or highly complex architectures to achieve high quality resulting images. However, demands for a low power, low cost, and high performance image scaler become more important because of emerging high quality mobile contents. In this paper we propose the novel low power hardware architecture for a high quality raster scan image scaler. The proposed scaler architecture enhances the existing cubic interpolation look-up table architecture by reducing and optimizing memory access and hardware components. The input data buffer of existing image scaler is replaced with line memories to reduce the number of memory access that is critical to power consumption. The cubic interpolation formula used in existing look-up table architecture is also rearranged to reduce the number of the multipliers and look-up table size. Finally we analyze the optimized parameter sets of look-up table, which is a trade-off between quality of result image and hardware size.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.8-12
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• 2008

For the reduction of fabrication cost and process time of AC plasma display panel (PDP), indium tin oxide (ITO) layer was patterned as bus electrode using Nd:$YVO_4$ laser. In comparison with the chemically wet etched ITO patterns, laser ablated ITO patterns showed the formation of shoulders and ripple-like structures at the edge of the ITO lines. For the reduction of shoulders and ripple-like structures, pulse repetition rate and scan velocity of laser was changed. In addition, we analyzed a discharge characteristic of PDP test panel to observe how the shoulders and ripple-like structures influence on the PDP. Based on experimental results, the pattern etched at the 500 mm/s and 40 kHz was better than any other condition. From this experiment we could see the possibility of the laser direct patterning for the application to the patterning of ITO in AC-PDP.