• Journal of the Korean Vacuum Society
• /
• v.18 no.4
• /
• pp.302-309
• /
• 2009

We fabricated a Si nano floating gate memory with Schottky barrier tunneling transistor structure. The device was consisted of Schottky barriers of Er-silicide at source/drain and Si nanoclusters in the gate stack formed by LPCVD-digital gas feeding method. Transistor operations due to the Schottky barrier tunneling were observed under small gate bias < 2V. The nonvolatile memory properties were investigated by measuring the threshold voltage shift along the gate bias voltage and time. We obtained the 10/50 mseconds for write/erase times and the memory window of $\sim5V$ under ${\pm}20\;V$ write/erase voltages. However, the memory window decreased to 0.4V after 104seconds, which was attributed to the Er-related defects in the tunneling oxide layer. Good write/erase endurance was maintained until $10^3$ write/erase times. However, the threshold voltages moved upward, and the memory window became small after more write/erase operations. Defects in the LPCVD control oxide were discussed for the endurance results. The experimental results point to the possibility of a Si nano floating gate memory with Schottky barrier tunneling transistor structure for Si nanoscale nonvolatile memory device.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.779-782
• /
• 2003

The theoretical and experimental current-voltage characteristics of Erbium silicided n-type Schottky barrier tunneling transistors (SBTTs) are discussed. The theoretical drain current to drain voltage characteristics show good correspondence and the extracted Schottky barrier height is 0.24 eV. The experimentally manufactured n-type SBTTs with 60 nm gate lengths show typical transistor behaviors in drain current to drain voltage characteristics. The drain current on/off ratio is about 10$^{5}$ at low drain voltage regime in drain current to gate voltage characteristics.